[PATCH v5 00/11] drm/i915/xe3lpd: ptl display patches

[Clint Taylor <clinton.a.taylor@intel.com>]

This series builds on the previous v4, Review Comments have addressed
for the first 2 patches in a series. 1 more VRR related patch dropped.
PTL display enabling patch added. 

Clint Taylor (1):
  drm/i915/cx0: Remove bus reset after every c10 transaction

Dnyaneshwar Bhadane (3):
  drm/i915/ptl: Define IS_PANTHERLAKE macro
  drm/i915/cx0: Extend C10 check to PTL
  drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register

Haridhar Kalvala (1):
  drm/xe/ptl: Enable PTL display

Heikkila, Juha-pekka (1):
  drm/i915/display/xe3: disable x-tiled framebuffers

Matt Roper (1):
  drm/i915/xe3lpd: Update pmdemand programming

Mika Kahola (1):
  drm/i915/xe3lpd: Power request asserting/deasserting

Ravi Kumar Vodapalli (1):
  drm/i915/xe3: Underrun recovery does not exist post Xe2

Suraj Kandpal (2):
  drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
  drm/i915/xe3lpd: Add check to see if edp over type c is allowed

 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 12 ++-
 .../gpu/drm/i915/display/intel_cx0_phy_regs.h |  3 +
 drivers/gpu/drm/i915/display/intel_display.c  |  2 +-
 .../drm/i915/display/intel_display_device.c   |  5 ++
 .../drm/i915/display/intel_display_device.h   |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  7 +-
 drivers/gpu/drm/i915/display/intel_fb.c       |  2 +-
 drivers/gpu/drm/i915/display/intel_hdcp.c     | 11 ++-
 drivers/gpu/drm/i915/display/intel_pmdemand.c | 73 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_pmdemand.h |  4 +-
 drivers/gpu/drm/i915/display/intel_tc.c       | 40 ++++++++++
 .../drm/i915/display/skl_universal_plane.c    | 13 +++-
 .../i915/display/skl_universal_plane_regs.h   |  1 +
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 drivers/gpu/drm/i915/i915_reg.h               |  9 +++
 .../gpu/drm/xe/compat-i915-headers/i915_drv.h |  1 +
 drivers/gpu/drm/xe/xe_pci.c                   |  2 +-
 17 files changed, 146 insertions(+), 41 deletions(-)

-- 
2.25.1