From: Zhanjun Dong <zhanjun.dong@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Zhanjun Dong <zhanjun.dong@intel.com>,
Alan Previn <alan.previn.teres.alexis@intel.com>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Michal Wajdeczko <michal.wajdeczko@intel.com>,
Andi Shyti <andi.shyti@intel.com>
Subject: [PATCH v1] drm/i915/guc: Always disable interrupt ahead of synchronize_irq
Date: Thu, 23 Jan 2025 08:23:51 -0800 [thread overview]
Message-ID: <20250123162351.1364395-1-zhanjun.dong@intel.com> (raw)
The purpose of synchronize_irq is to wait for any pending IRQ handlers for the
interrupt to complete, if synchronize_irq called before interrupt disabled, an
tiny timing window created, where no more pending IRQ, but interrupt not
disabled yet. Meanwhile, if the interrupt event happened in this timing window,
an unexpected IRQ handling will be triggered.
Fixed by always disable interrupt ahead of synchronize_irq.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13454
Fixes: 26705e20752a ("drm/i915: Support for GuC interrupts")
Fixes: 54c52a841250 ("drm/i915/guc: Correctly handle GuC interrupts on Gen11")
Fixes: 2ae096872a2c ("drm/i915/pxp: Implement PXP irq handler")
Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management")
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Andi Shyti <andi.shyti@intel.com>
---
drivers/gpu/drm/i915/gt/intel_rps.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 4 ++--
drivers/gpu/drm/i915/pxp/intel_pxp_irq.c | 2 +-
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index fa304ea088e4..0fe7a8d7f460 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -244,8 +244,8 @@ static void rps_disable_interrupts(struct intel_rps *rps)
gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);
spin_unlock_irq(gt->irq_lock);
+ rps_reset_interrupts(rps);
intel_synchronize_irq(gt->i915);
-
/*
* Now that we will not be generating any more work, flush any
* outstanding tasks. As we are called on the RPS idle path,
@@ -254,7 +254,6 @@ static void rps_disable_interrupts(struct intel_rps *rps)
*/
cancel_work_sync(&rps->work);
- rps_reset_interrupts(rps);
GT_TRACE(gt, "interrupts:off\n");
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5949ff0b0161..3e7b2c6cdca4 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -116,9 +116,9 @@ static void gen9_disable_guc_interrupts(struct intel_guc *guc)
gen6_gt_pm_disable_irq(gt, gt->pm_guc_events);
spin_unlock_irq(gt->irq_lock);
- intel_synchronize_irq(gt->i915);
gen9_reset_guc_interrupts(guc);
+ intel_synchronize_irq(gt->i915);
}
static bool __gen11_reset_guc_interrupts(struct intel_gt *gt)
@@ -154,9 +154,9 @@ static void gen11_disable_guc_interrupts(struct intel_guc *guc)
struct intel_gt *gt = guc_to_gt(guc);
guc->interrupts.enabled = false;
- intel_synchronize_irq(gt->i915);
gen11_reset_guc_interrupts(guc);
+ intel_synchronize_irq(gt->i915);
}
static void guc_dead_worker_func(struct work_struct *w)
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
index d81750b9bdda..b82a667e7ac0 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_irq.c
@@ -101,9 +101,9 @@ void intel_pxp_irq_disable(struct intel_pxp *pxp)
__pxp_set_interrupts(gt, 0);
spin_unlock_irq(gt->irq_lock);
- intel_synchronize_irq(gt->i915);
pxp_irq_reset(gt);
+ intel_synchronize_irq(gt->i915);
flush_work(&pxp->session_work);
}
--
2.34.1
next reply other threads:[~2025-01-23 16:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-23 16:23 Zhanjun Dong [this message]
2025-01-23 16:53 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Always disable interrupt ahead of synchronize_irq Patchwork
2025-01-23 17:07 ` ✓ i915.CI.BAT: success " Patchwork
2025-01-24 9:43 ` ✗ i915.CI.Full: failure " Patchwork
2025-01-27 14:44 ` [PATCH v1] " Sebastian Brzezinka
2025-01-27 15:21 ` Andi Shyti
[not found] ` <41833264-348a-443e-ba89-f559cc9114cb@intel.com>
2025-02-03 13:29 ` Andi Shyti
2025-02-03 23:50 ` Dong, Zhanjun
2025-02-04 10:25 ` Andi Shyti
2025-01-27 17:12 ` Daniele Ceraolo Spurio
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250123162351.1364395-1-zhanjun.dong@intel.com \
--to=zhanjun.dong@intel.com \
--cc=alan.previn.teres.alexis@intel.com \
--cc=andi.shyti@intel.com \
--cc=daniele.ceraolospurio@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=michal.wajdeczko@intel.com \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox