From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 0/9] drm/i915/dmc: Deal with loss of pipe DMC state
Date: Wed, 11 Jun 2025 18:52:32 +0300 [thread overview]
Message-ID: <20250611155241.24191-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Attempt to deal with the fact that pipe DMCs can sometimes
lose their state.
Ville Syrjälä (9):
drm/i915/dmc: Limit pipe DMC clock gating w/a to just ADL/DG2/MTL
drm/i915/dmc: Parametrize MTL_PIPEDMC_GATING_DIS
drm/i915/dmc: Shuffle code around
drm/i915/dmc: Extract dmc_load_program()
drm/i915/dmc: Reload pipe DMC state on TGL when enabling pipe A
drm/i915/dmc: Reload pipe DMC MMIO registers for pipe C/D on PTL+
drm/i915/dmc: Assert DMC is loaded harder
drm/i915/dmc: Pass crtc_state to intel_dmc_{enable,disable}_pipe()
drm/i915/dmc: Do not enable the pipe DMC on TGL when PSR is possible
drivers/gpu/drm/i915/display/intel_display.c | 16 +-
.../i915/display/intel_display_power_well.c | 4 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 336 +++++++++++-------
drivers/gpu/drm/i915/display/intel_dmc.h | 7 +-
.../drm/i915/display/intel_modeset_setup.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 3 +-
6 files changed, 234 insertions(+), 134 deletions(-)
--
2.49.0
next reply other threads:[~2025-06-11 15:52 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 15:52 Ville Syrjala [this message]
2025-06-11 15:52 ` [PATCH 1/9] drm/i915/dmc: Limit pipe DMC clock gating w/a to just ADL/DG2/MTL Ville Syrjala
2025-06-11 15:52 ` [PATCH 2/9] drm/i915/dmc: Parametrize MTL_PIPEDMC_GATING_DIS Ville Syrjala
2025-06-11 15:52 ` [PATCH 3/9] drm/i915/dmc: Shuffle code around Ville Syrjala
2025-06-11 15:52 ` [PATCH 4/9] drm/i915/dmc: Extract dmc_load_program() Ville Syrjala
2025-06-12 20:16 ` Shankar, Uma
2025-06-13 14:18 ` Ville Syrjälä
2025-06-17 18:58 ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 5/9] drm/i915/dmc: Reload pipe DMC state on TGL when enabling pipe A Ville Syrjala
2025-06-12 20:32 ` Shankar, Uma
2025-06-13 14:09 ` Ville Syrjälä
2025-06-17 18:51 ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 6/9] drm/i915/dmc: Reload pipe DMC MMIO registers for pipe C/D on PTL+ Ville Syrjala
2025-06-11 15:52 ` [PATCH 7/9] drm/i915/dmc: Assert DMC is loaded harder Ville Syrjala
2025-06-12 20:55 ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 8/9] drm/i915/dmc: Pass crtc_state to intel_dmc_{enable, disable}_pipe() Ville Syrjala
2025-06-12 20:58 ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 9/9] drm/i915/dmc: Do not enable the pipe DMC on TGL when PSR is possible Ville Syrjala
2025-06-12 21:02 ` Shankar, Uma
2025-06-11 17:37 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dmc: Deal with loss of pipe DMC state Patchwork
2025-06-11 17:59 ` ✓ i915.CI.BAT: success " Patchwork
2025-06-11 21:09 ` ✗ i915.CI.Full: failure " Patchwork
2025-06-14 9:13 ` ✓ i915.CI.BAT: success for drm/i915/dmc: Deal with loss of pipe DMC state (rev2) Patchwork
2025-06-14 11:01 ` ✗ i915.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250611155241.24191-1-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox