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From: Imre Deak <imre.deak@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Cc: <dri-devel@lists.freedesktop.org>,
	Vidya Srinivas <vidya.srinivas@intel.com>,
	Swati Sharma <swati2.sharma@intel.com>
Subject: [PATCH v2 1/5] drm/dp: Add quirk for Synaptics DSC throughput link-bpp limit
Date: Mon, 22 Sep 2025 16:46:36 +0300	[thread overview]
Message-ID: <20250922134637.271999-1-imre.deak@intel.com> (raw)
In-Reply-To: <20250918211223.209674-2-imre.deak@intel.com>

Some Synaptics MST branch devices have a problem decompressing a stream
with a compressed link-bpp higher than 12, if the pixel clock is higher
than ~50 % of the maximum throughput capability reported by the branch
device. The screen remains blank, or for some - mostly black content -
gets enabled, but may stil have jitter artifacts.

At least the following docking stations are affected, based on testing
both with any Intel devices or the UCD-500 reference device as a source:

- DELL WD19DCS, DELL WD19TB3, DELL WD22TB4
- ThinkPad 40AN
- HP G2

At least the following docking stations are free from this problem,
based on tests with a source/sink/mode etc. configuration matching the
test cases used above:

- DELL Dual Charge HD22Q, DELL WD25TB5
- ThinkPad 40B0
- Anker 565

All the affected devices have an older version of the Synaptics MST
branch device (Panarema), whereas all the non-affected docking stations
have a newer branch device (at least Synaptics Panarema with a higher HW
revision number and Synaptics Cayenne models). Add the required quirk
entries accordingly. The quirk will be handled by the i915/xe drivers in
a follow-up change.

The latest firmware version of the Synaptics branch device for all the
affected devices tested above is 5.7 (as reported at DPCD address
0x50a/0x50b). For the DELL devices this corresponds to the latest
01.00.14.01.A03 firmware package version of the docking station.

v2:
- Document the DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT enum.
- Describe the quirk in more detail in the dpcd_quirk_list.

Cc: dri-devel@lists.freedesktop.org
Reported-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reported-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/display/drm_dp_helper.c | 4 ++++
 include/drm/display/drm_dp_helper.h     | 9 +++++++++
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
index 5426db21e53f..1c74fe9459ad 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2551,6 +2551,10 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
 	{ OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
 	/* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low DP_MAX_LINK_RATE */
 	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },
+	/* Synaptics Panamera supports only a compressed bpp of 12 above 50% of its max DSC pixel throughput */
+	{ OUI(0x90, 0xCC, 0x24), DEVICE_ID('S', 'Y', 'N', 'A', 0x53, 0x22), true, BIT(DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT) },
+	{ OUI(0x90, 0xCC, 0x24), DEVICE_ID('S', 'Y', 'N', 'A', 0x53, 0x31), true, BIT(DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT) },
+	{ OUI(0x90, 0xCC, 0x24), DEVICE_ID('S', 'Y', 'N', 'A', 0x53, 0x33), true, BIT(DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT) },
 };
 
 #undef OUI
diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h
index 52ce28097015..e438c4440995 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -828,6 +828,15 @@ enum drm_dp_quirk {
 	 * requires enabling DSC.
 	 */
 	DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC,
+	/**
+	 * @DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT:
+	 *
+	 * The device doesn't support DSC decompression at the maximum DSC
+	 * pixel throughput and compressed bpp it indicates via its DPCD DSC
+	 * capabilities. The compressed bpp must be limited above a device
+	 * specific DSC pixel throughput.
+	 */
+	DP_DPCD_QUIRK_DSC_THROUGHPUT_BPP_LIMIT,
 };
 
 /**
-- 
2.49.1


  parent reply	other threads:[~2025-09-22 13:48 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 21:12 [PATCH 0/5] drm/i915/dp: Work around a DSC pixel throughput issue Imre Deak
2025-09-18 21:12 ` [PATCH 1/5] drm/dp: Add quirk for Synaptics DSC throughput link-bpp limit Imre Deak
2025-09-20 17:18   ` kernel test robot
2025-09-22 13:46   ` Imre Deak [this message]
2025-09-18 21:12 ` [PATCH 2/5] drm/i915/dp: Calculate DSC slice count based on per-slice peak throughput Imre Deak
2025-09-22 19:34   ` Ville Syrjälä
2025-09-23 11:47     ` Imre Deak
2025-09-18 21:12 ` [PATCH 3/5] drm/i915/dp: Pass DPCD device descriptor to intel_dp_get_dsc_sink_cap() Imre Deak
2025-09-18 21:12 ` [PATCH 4/5] drm/i915/dp: Verify branch devices' overall pixel throughput/line width Imre Deak
2025-09-22 19:35   ` Ville Syrjälä
2025-09-22 20:06     ` Ville Syrjälä
2025-09-23 12:00       ` Imre Deak
2025-09-18 21:12 ` [PATCH 5/5] drm/i915/dp: Handle Synaptics DSC throughput link-bpp quirk Imre Deak
2025-09-22 13:46   ` [PATCH v2 " Imre Deak
2025-09-22 20:17     ` Ville Syrjälä
2025-09-23 12:08       ` Imre Deak
2025-09-25 22:08   ` [PATCH v4 " Imre Deak
2025-09-18 23:32 ` ✓ i915.CI.BAT: success for drm/i915/dp: Work around a DSC pixel throughput issue Patchwork
2025-09-19 21:10 ` ✓ i915.CI.Full: " Patchwork
2025-09-22 14:32 ` ✓ i915.CI.BAT: success for drm/i915/dp: Work around a DSC pixel throughput issue (rev3) Patchwork
2025-09-22 16:19 ` ✗ i915.CI.Full: failure " Patchwork

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