[RFC v1 07/11] drm/i915/lt: align xe3plpd with V/P Override layout

["Michał Grzelak" <michal.grzelak@intel.com>]

Align struct xe3plpd_lt_phy_buf_trans to match layout found in
vswing/preemphasis override tables.

Move txswing & txswing_level to the end of the struct. Keep order
between txswing & txswing_level columns in xe3plpd_lt_* tables.

Move post_cursor from third field to second.

Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
 .../drm/i915/display/intel_ddi_buf_trans.c    | 72 +++++++++----------
 .../drm/i915/display/intel_ddi_buf_trans.h    |  6 +-
 2 files changed, 39 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 8b369535189c..528a0ccfe8a2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1118,50 +1118,50 @@ static const struct intel_ddi_buf_trans mtl_c20_trans_uhbr = {
 
 /* DP1.4 */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_dp14[] = {
-	{ .lt = { 1, 0, 0, 21, 0  } },
-	{ .lt = { 1, 1, 0, 24, 3  } },
-	{ .lt = { 1, 2, 0, 28, 7  } },
-	{ .lt = { 0, 3, 0, 35, 13 } },
-	{ .lt = { 1, 1, 0, 27, 0  } },
-	{ .lt = { 1, 2, 0, 31, 4  } },
-	{ .lt = { 0, 3, 0, 39, 9  } },
-	{ .lt = { 1, 2, 0, 35, 0  } },
-	{ .lt = { 0, 3, 0, 41, 7  } },
-	{ .lt = { 0, 3, 0, 48, 0  } },
+	{ .lt = { 21, 0, 0 , 1, 0 } },
+	{ .lt = { 24, 0, 3 , 1, 1 } },
+	{ .lt = { 28, 0, 7 , 1, 2 } },
+	{ .lt = { 35, 0, 13, 0, 3 } },
+	{ .lt = { 27, 0, 0 , 1, 1 } },
+	{ .lt = { 31, 0, 4 , 1, 2 } },
+	{ .lt = { 39, 0, 9 , 0, 3 } },
+	{ .lt = { 35, 0, 0 , 1, 2 } },
+	{ .lt = { 41, 0, 7 , 0, 3 } },
+	{ .lt = { 48, 0, 0 , 0, 3 } },
 };
 
 /* DP2.1 */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_uhbr[] = {
-	{ .lt = { 0, 0, 0, 48, 0  } },
-	{ .lt = { 0, 0, 0, 43, 5  } },
-	{ .lt = { 0, 0, 0, 40, 8  } },
-	{ .lt = { 0, 0, 0, 37, 11 } },
-	{ .lt = { 0, 0, 0, 33, 15 } },
-	{ .lt = { 0, 0, 2, 46, 0  } },
-	{ .lt = { 0, 0, 2, 42, 4  } },
-	{ .lt = { 0, 0, 2, 38, 8  } },
-	{ .lt = { 0, 0, 2, 35, 11 } },
-	{ .lt = { 0, 0, 2, 33, 13 } },
-	{ .lt = { 0, 0, 4, 44, 0  } },
-	{ .lt = { 0, 0, 4, 40, 4  } },
-	{ .lt = { 0, 0, 4, 37, 7  } },
-	{ .lt = { 0, 0, 4, 33, 11 } },
-	{ .lt = { 0, 0, 8, 40, 0  } },
-	{ .lt = { 1, 0, 2, 26, 2  } },
+	{ .lt = { 48, 0, 0 , 0, 0 } },
+	{ .lt = { 43, 0, 5 , 0, 0 } },
+	{ .lt = { 40, 0, 8 , 0, 0 } },
+	{ .lt = { 37, 0, 11, 0, 0 } },
+	{ .lt = { 33, 0, 15, 0, 0 } },
+	{ .lt = { 46, 2, 0 , 0, 0 } },
+	{ .lt = { 42, 2, 4 , 0, 0 } },
+	{ .lt = { 38, 2, 8 , 0, 0 } },
+	{ .lt = { 35, 2, 11, 0, 0 } },
+	{ .lt = { 33, 2, 13, 0, 0 } },
+	{ .lt = { 44, 4, 0 , 0, 0 } },
+	{ .lt = { 40, 4, 4 , 0, 0 } },
+	{ .lt = { 37, 4, 7 , 0, 0 } },
+	{ .lt = { 33, 4, 11, 0, 0 } },
+	{ .lt = { 40, 8, 0 , 0, 0 } },
+	{ .lt = { 26, 2, 2 , 1, 0 } },
 };
 
 /* eDp */
 static const union intel_ddi_buf_trans_entry _xe3plpd_lt_trans_edp[] = {
-	{ .lt = { 1, 0, 0, 12, 0 } },
-	{ .lt = { 1, 1, 0, 13, 1 } },
-	{ .lt = { 1, 2, 0, 15, 3 } },
-	{ .lt = { 1, 3, 0, 19, 7 } },
-	{ .lt = { 1, 1, 0, 14, 0 } },
-	{ .lt = { 1, 2, 0, 16, 2 } },
-	{ .lt = { 1, 3, 0, 21, 5 } },
-	{ .lt = { 1, 2, 0, 18, 0 } },
-	{ .lt = { 1, 3, 0, 22, 4 } },
-	{ .lt = { 1, 3, 0, 26, 0 } },
+	{ .lt = { 12, 0, 0, 1, 0 } },
+	{ .lt = { 13, 0, 1, 1, 1 } },
+	{ .lt = { 15, 0, 3, 1, 2 } },
+	{ .lt = { 19, 0, 7, 1, 3 } },
+	{ .lt = { 14, 0, 0, 1, 1 } },
+	{ .lt = { 16, 0, 2, 1, 2 } },
+	{ .lt = { 21, 0, 5, 1, 3 } },
+	{ .lt = { 18, 0, 0, 1, 2 } },
+	{ .lt = { 22, 0, 4, 1, 3 } },
+	{ .lt = { 26, 0, 0, 1, 3 } },
 };
 
 static const struct intel_ddi_buf_trans xe3plpd_lt_trans_dp14 = {
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
index cec332090a20..7703c6c0a0cb 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
@@ -51,11 +51,11 @@ struct dg2_snps_phy_buf_trans {
 };
 
 struct xe3plpd_lt_phy_buf_trans {
-	u8 txswing;
-	u8 txswing_level;
-	u8 pre_cursor;
 	u8 main_cursor;
+	u8 pre_cursor;
 	u8 post_cursor;
+	u8 txswing;
+	u8 txswing_level;
 };
 
 union intel_ddi_buf_trans_entry {
-- 
2.45.2