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From: sashiko-bot@kernel.org
To: "Animesh Manna" <animesh.manna@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v5 10/15] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM
Date: Tue, 25 Aug 2026 06:32:03 +0000	[thread overview]
Message-ID: <20260825063203.C73D01F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260825054536.3455704-11-animesh.manna@intel.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Logical inversion in the early return condition causes `intel_dp_update_lttpr_count` to unconditionally return for all display types, rendering the new feature completely inactive.
- [Medium] Mismatch between comment and code for LTTPR revision check.
--

--- Patch [10]: [PATCH v5 10/15] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM ---
commit 2590778ff6f9e6755fe0231710bcb90018b982c4
Author: Animesh Manna <animesh.manna@intel.com>

drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM

This commit adds an AUX write transaction to DP_TOTAL_LTTPR_CNT (0xf000a)
with the total number of LTTPRs before link training for DP 2.1 ALPM.

> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index cb92cff906146..1d5873cb64f55 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
[ ... ]
> @@ -2265,6 +2265,20 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
>  	return passed;
>  }
>  
> +static void intel_dp_update_lttpr_count(struct intel_dp *intel_dp,
> +					int lttpr_count)
> +{
> +	/*
> +	 * Program only for DP2.1 and return if LTTPR revison is less than 0x20
> +	 * where 0:3 represents minor rev and 4:7 represent major rev
> +	 */

[Severity: Medium]
Does this comment contradict the logic implemented below? 

The comment states the function should return if the revision is "less
than 0x20", while the code correctly checks for less than or equal to 0x20
to filter out DP 2.0.

> +	if (!intel_dp_is_edp(intel_dp) ||
> +	    intel_dp->lttpr_common_caps[0] <= 0x20)
> +		return;

[Severity: High]
Does this logic inadvertently cause an unconditional early return for all
display types?

For external DP displays where LTTPRs are used, !intel_dp_is_edp(intel_dp)
evaluates to true, triggering the early return immediately.

For eDP displays, !intel_dp_is_edp(intel_dp) evaluates to false, but since
eDP bypasses LTTPR initialization in intel_dp_init_lttpr_and_dprx_caps(),
intel_dp->lttpr_common_caps remains zero-initialized. 

This causes intel_dp->lttpr_common_caps[0] <= 0x20 to evaluate to true
(since 0 is less than 0x20), which also triggers the early return.

Was the intention to check intel_dp_is_edp(intel_dp) without the logical
inversion to properly bypass eDP?

> +
> +	drm_dp_dpcd_writeb(&intel_dp->aux, DP_TOTAL_LTTPR_CNT, lttpr_count);
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260825054536.3455704-1-animesh.manna@intel.com?part=10

  reply	other threads:[~2026-08-25  6:32 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-25  5:45 [PATCH v5 00/15] Enable DP2.1 alpm Animesh Manna
2026-08-25  5:45 ` [PATCH v5 01/15] drm/i915/alpm: Add DPCD definition for DP2.1 ALPM capability Animesh Manna
2026-08-25  7:55   ` Kandpal, Suraj
2026-08-27 10:51     ` Manna, Animesh
2026-08-25  5:45 ` [PATCH v5 02/15] drm/i915/alpm: Move alpm sink capabality readout in separate function Animesh Manna
2026-08-25  6:28   ` sashiko-bot
2026-08-25  7:57   ` Kandpal, Suraj
2026-08-25  5:45 ` [PATCH v5 03/15] drm/i915/alpm: alpm_init() for DP2.1 Animesh Manna
2026-08-25  7:44   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 04/15] drm/i915/alpm: Enable debugfs " Animesh Manna
2026-08-25  6:38   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 05/15] drm/i915/alpm: Refactor Auxless wake time calculation Animesh Manna
2026-08-25  5:45 ` [PATCH v5 06/15] drm/i915/alpm: Auxless wake time calculation for Xe3p Animesh Manna
2026-08-25  6:30   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 07/15] drm/i915/alpm: table based establishment period Animesh Manna
2026-08-25  6:34   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 08/15] drm/i915/alpm: Half LFPS cycle calculation Animesh Manna
2026-08-25  6:31   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 09/15] drm/i915/alpm: Modify LFPS cycle count for DP ALPM Animesh Manna
2026-08-25  6:33   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 10/15] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM Animesh Manna
2026-08-25  6:32   ` sashiko-bot [this message]
2026-08-25  5:45 ` [PATCH v5 11/15] drm/i915/alpm: Enable MAC Transmitting LFPS for LT PHY Animesh Manna
2026-08-25  5:45 ` [PATCH v5 12/15] drm/i915/alpm: Replace is_edp() with alpm_is_possible() Animesh Manna
2026-08-25  6:43   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 13/15] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf Animesh Manna
2026-08-25  6:35   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 14/15] drm/i915/alpm: Compute and program switch to active latency Animesh Manna
2026-08-25  6:39   ` sashiko-bot
2026-08-25  5:45 ` [PATCH v5 15/15] drm/i915/alpm: Program zero-based LFPS half cycle duration Animesh Manna
2026-08-25  6:40   ` sashiko-bot
2026-08-25  7:11 ` ✓ i915.CI.BAT: success for Enable DP2.1 alpm (rev5) Patchwork
2026-08-25 11:12 ` ✗ i915.CI.Full: failure " Patchwork

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