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From: Nemesa Garg <nemesa.garg@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: Nemesa Garg <nemesa.garg@intel.com>
Subject: [PATCH] drm/i915/display: Limit SEL_FETCH clear to supported pipes
Date: Fri,  4 Sep 2026 11:57:44 +0530	[thread overview]
Message-ID: <20260904062744.3010375-1-nemesa.garg@intel.com> (raw)

Commit 7f1172a2ac0d ("drm/i915/display: Clear SEL_FETCH_PLANE_CTL
on plane disable") started clearing SEL_FETCH_PLANE_CTL and
SEL_FETCH_CUR_CTL on every plane and cursor disable.

Not all pipes implement these registers. Clearing them on a pipe
that does not have them leads to an unclaimed register access.

Skip the clear on pipes that do not implement the registers.

Fixes: 7f1172a2ac0d ("drm/i915/display: Clear SEL_FETCH_PLANE_CTL on plane disable")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16876
Assisted-by: GitHub-Copilot:claude-opus-4.6
Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cursor.c        | 4 ++++
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 86bb96ac449b..3c06d5482691 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -544,6 +544,10 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_dsb *dsb,
 	if (!HAS_PSR2_SEL_FETCH(display))
 		return;
 
+	/* Display ver 12 only instantiates these registers for pipe A */
+	if (DISPLAY_VER(display) == 12 && pipe != PIPE_A)
+		return;
+
 	intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), 0);
 }
 
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 5cda1ab90e40..252df30debc9 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -893,6 +893,10 @@ static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
 	if (!HAS_PSR2_SEL_FETCH(display))
 		return;
 
+	/* Display ver 12 only instantiates these registers for pipe A */
+	if (DISPLAY_VER(display) == 12 && pipe != PIPE_A)
+		return;
+
 	intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);
 }
 
-- 
2.25.1


             reply	other threads:[~2026-09-04  6:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-04  6:27 Nemesa Garg [this message]
2026-09-04  6:45 ` [PATCH] drm/i915/display: Limit SEL_FETCH clear to supported pipes sashiko-bot
2026-09-04  7:10 ` Jani Nikula
2026-09-07  4:10   ` Garg, Nemesa
2026-09-07  9:56     ` Jani Nikula
2026-09-07 13:21       ` Garg, Nemesa
2026-09-04  8:20 ` ✗ i915.CI.BAT: failure for " Patchwork

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