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From: sashiko-bot@kernel.org
To: "Nemesa Garg" <nemesa.garg@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/display: Limit SEL_FETCH clear to supported pipes
Date: Mon, 07 Sep 2026 04:32:05 +0000	[thread overview]
Message-ID: <20260907043206.446601F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260907042142.3114009-1-nemesa.garg@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The patch introduces a build failure by using an undeclared variable `crtc_state` in function bodies without updating their signatures.
--

commit abf33fb81864e3a646619421c587c1bc7e6b1f3d
Author: Nemesa Garg <nemesa.garg@intel.com>

drm/i915/display: Limit SEL_FETCH clear to supported pipes

This commit limits the clearing of selective fetch registers to pipes that
actually support them. It avoids unclaimed register access warnings by
checking the selective fetch enable state before clearing.

Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16876

> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index cce041e1da51d..aa662b2cdf42b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -536,13 +536,7 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_dsb *dsb,
>  	struct intel_display *display = to_intel_display(plane);
>  	enum pipe pipe = plane->pipe;
>  
> -	/*
> -	 * Clear this whenever the hardware has selective fetch, not just when
> -	 * the current state uses it. The cursor may have been enabled with
> -	 * selective fetch earlier and had its enable bit orphaned when the
> -	 * feature was switched off.
> -	 */
> -	if (!HAS_PSR2_SEL_FETCH(display))
> +	if (!crtc_state->enable_psr2_sel_fetch)

[Severity: Low]
Does this cause a build failure? The variable crtc_state is used here but
isn't declared in the function signature for
i9xx_cursor_disable_sel_fetch_arm(). While the callers were updated to pass
crtc_state as a third argument, the function signature itself wasn't updated.

[ ... ]

> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 5cda1ab90e40f..a7e2f44ebfca6 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -884,13 +884,7 @@ static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
>  	struct intel_display *display = to_intel_display(plane);
>  	enum pipe pipe = plane->pipe;
>  
> -	/*
> -	 * Clear this whenever the hardware has selective fetch, not just when
> -	 * the current state uses it. The plane may have been enabled with
> -	 * selective fetch earlier and had its enable bit orphaned when the
> -	 * feature was switched off.
> -	 */
> -	if (!HAS_PSR2_SEL_FETCH(display))
> +	if (!crtc_state->enable_psr2_sel_fetch)

[Severity: Low]
Does this also cause a build failure? Similar to the cursor code above, the
function signature for icl_plane_disable_sel_fetch_arm() is missing the
crtc_state parameter, leading to an undeclared identifier error here and a
"too many arguments" error at the callers.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260907042142.3114009-1-nemesa.garg@intel.com?part=1

      reply	other threads:[~2026-09-07  4:32 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-07  4:21 [PATCH v2] drm/i915/display: Limit SEL_FETCH clear to supported pipes Nemesa Garg
2026-09-07  4:32 ` sashiko-bot [this message]

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