From: Werner Sembach <wse@tuxedocomputers.com>
To: "Jani Nikula" <jani.nikula@linux.intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Tvrtko Ursulin" <tursulin@ursulin.net>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Matthew Brost" <matthew.brost@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Cc: Werner Sembach <wse@tuxedocomputers.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, intel-xe@lists.freedesktop.org
Subject: [PATCH 2/2] drm/intel: Add quirk to disable rc6 on some TUXEDO devices
Date: Tue, 8 Sep 2026 22:05:29 +0200 [thread overview]
Message-ID: <20260908200707.65516-2-wse@tuxedocomputers.com> (raw)
In-Reply-To: <20260908200707.65516-1-wse@tuxedocomputers.com>
Some TUXEDO devices have random rare hard resets during video streaming.
Disabling rc6 fixes this. Until the root cause is found this is a pragmatic
workaround.
Signed-off-by: Werner Sembach <wse@tuxedocomputers.com>
---
drivers/gpu/drm/i915/i915_pci.c | 11 +++++++++++
include/drm/intel/pciids.h | 22 ++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 2f03f95945f1b..a52b56bedcf4f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -687,6 +687,16 @@ static const struct intel_device_info adl_p_info = {
.dma_mask_size = 39,
};
+static const struct intel_device_info adl_p_tux_ibp8_quirk_info = {
+ GEN12_FEATURES,
+ PLATFORM(INTEL_ALDERLAKE_P),
+ .platform_engine_mask =
+ BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
+ .__runtime.ppgtt_size = 48,
+ .dma_mask_size = 39,
+ .has_rc6 = 0,
+};
+
#undef GEN
#define XE_HP_PAGE_SIZES \
@@ -863,6 +873,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_DG1_IDS(INTEL_VGA_DEVICE, &dg1_info),
INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_info),
INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &adl_p_info),
+ INTEL_RPLP_TUX_IBP8_QUIRK_IDS(INTEL_VGA_DEVICE, &adl_p_tux_ibp8_quirk_info),
INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &adl_p_info),
INTEL_DG2_IDS(INTEL_VGA_DEVICE, &dg2_info),
INTEL_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_info),
diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h
index 7a4a5658942d2..e4f74916a62c2 100644
--- a/include/drm/intel/pciids.h
+++ b/include/drm/intel/pciids.h
@@ -712,6 +712,28 @@
MACRO__(0xA7AC, ## __VA_ARGS__), \
MACRO__(0xA7AD, ## __VA_ARGS__)
+#define INTEL_RPLP_TUX_IBP8_QUIRK_IDS(MACRO__, ...) \
+ MACRO__##_SUB(0xA720, 0x1D05, 0x124A, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA720, 0x1D05, 0x124C, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA720, 0x1D05, 0x124E, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA720, 0x1D05, 0x130F, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A0, 0x1D05, 0x124A, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A0, 0x1D05, 0x124C, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A0, 0x1D05, 0x124E, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A0, 0x1D05, 0x130F, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A8, 0x1D05, 0x124A, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A8, 0x1D05, 0x124C, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A8, 0x1D05, 0x124E, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7A8, 0x1D05, 0x130F, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AA, 0x1D05, 0x124A, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AA, 0x1D05, 0x124C, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AA, 0x1D05, 0x124E, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AA, 0x1D05, 0x130F, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AB, 0x1D05, 0x124A, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AB, 0x1D05, 0x124C, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AB, 0x1D05, 0x124E, ## __VA_ARGS__), \
+ MACRO__##_SUB(0xA7AB, 0x1D05, 0x130F, ## __VA_ARGS__)
+
/* RPL-P */
#define INTEL_RPLP_IDS(MACRO__, ...) \
MACRO__(0xA720, ## __VA_ARGS__), \
--
2.43.0
next prev parent reply other threads:[~2026-09-08 20:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 20:05 [PATCH 1/2] drm/intel: Generalize PCI ID macro for subvendor and subid Werner Sembach
2026-09-08 20:05 ` Werner Sembach [this message]
2026-09-09 6:32 ` [PATCH 2/2] drm/intel: Add quirk to disable rc6 on some TUXEDO devices Jani Nikula
2026-09-09 13:45 ` Werner Sembach
2026-09-09 15:59 ` Werner Sembach
2026-09-08 22:39 ` ✓ i915.CI.BAT: success for series starting with [1/2] drm/intel: Generalize PCI ID macro for subvendor and subid Patchwork
2026-09-09 16:04 ` ✓ i915.CI.Full: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260908200707.65516-2-wse@tuxedocomputers.com \
--to=wse@tuxedocomputers.com \
--cc=airlied@gmail.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jani.nikula@linux.intel.com \
--cc=joonas.lahtinen@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=matthew.brost@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=simona@ffwll.ch \
--cc=thomas.hellstrom@linux.intel.com \
--cc=tursulin@ursulin.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox