[PATCH v2 09/13] drm/i915: Extract commit_dsb_max_cmds()

[Ville Syrjala <ville.syrjala@linux.intel.com>]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The code to determine the number of required DSB commands for
the commit is now split into two parts in a messy way, and the
comment explaining the numbers is completely ditached from the
place that actually has those numbers. Consolidtate it all into
a single function that makes sense.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 31 +++++++++++++-------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7741f1395375..d7bd1b862aa9 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7402,29 +7402,40 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state,
 	intel_color_prepare_commit(state, crtc);
 }
 
+static unsigned int
+commit_dsb_max_cmds(const struct intel_crtc_state *crtc_state)
+{
+	/* just enough to start the chained DSB */
+	if (!crtc_state->use_dsb && !crtc_state->use_flipq)
+		return 16;
+
+	/*
+	 * Rough estimate:
+	 * ~64 registers per each plane * 8 planes = 512
+	 * Double that for pipe stuff and other overhead.
+	 * ~4913 registers for 3DLUT
+	 * ~200 color registers * 3 HDR planes
+	 */
+	if (crtc_state->plane_color_changed)
+		return 8192;
+	else
+		return 1024;
+}
+
 static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
 				    struct intel_crtc *crtc)
 {
 	struct intel_display *display = to_intel_display(state);
 	struct intel_crtc_state *new_crtc_state =
 		intel_atomic_get_new_crtc_state(state, crtc);
-	unsigned int size = new_crtc_state->plane_color_changed ? 8192 : 1024;
 
 	if (!new_crtc_state->use_flipq &&
 	    !new_crtc_state->use_dsb &&
 	    !new_crtc_state->dsb_color)
 		return;
 
-	/*
-	 * Rough estimate:
-	 * ~64 registers per each plane * 8 planes = 512
-	 * Double that for pipe stuff and other overhead.
-	 * ~4913 registers for 3DLUT
-	 * ~200 color registers * 3 HDR planes
-	 */
 	new_crtc_state->dsb_commit = intel_dsb_prepare(state, crtc, INTEL_DSB_0,
-						       new_crtc_state->use_dsb ||
-						       new_crtc_state->use_flipq ? size : 16);
+						       commit_dsb_max_cmds(new_crtc_state));
 	if (!new_crtc_state->dsb_commit) {
 		new_crtc_state->use_flipq = false;
 		new_crtc_state->use_dsb = false;
-- 
2.54.0