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From: sashiko-bot@kernel.org
To: "Xizhe Tang" <xizheTang2005@163.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async
Date: Wed, 23 Sep 2026 14:27:21 +0000	[thread overview]
Message-ID: <20260923142721.D56F11F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260923195200.21362-1-xizheTang2005@163.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] drm/i915: build failure due to missing vrr qualifier for cmrr
--

commit 040a3a223ae954dab43478f6da5edfc88f5ff693
Author: Xizhe Tang <xizheTang2005@163.com>

drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async

This commit alters the condition for sending the Adaptive-Sync SDP by checking
explicitly for VRR or CMRR enablement in the CRTC state. This prevents vertical
streaking on eDP panels that advertise VRR but run at fixed refresh rates.

Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9252

> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0cd5e6b5034cf..612bc2846475b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3111,7 +3111,8 @@ static bool intel_dp_needs_as_sdp(struct intel_dp *intel_dp,
>  	    !intel_psr_pr_async_video_timing_supported(intel_dp))
>  		return true;
>  
> -	return intel_vrr_possible(crtc_state);
> +	return crtc_state->vrr.enable ||
> +	       crtc_state->cmrr.enable;

[Severity: Low]
Does this cause a compilation error in intel_dp_needs_as_sdp()? 

Looking at the definition of intel_crtc_state in
drivers/gpu/drm/i915/display/intel_display_types.h, cmrr is nested inside vrr:

    struct intel_crtc_state {
        ...
        struct {
            ...
            /* Content Match Refresh Rate state */
            struct {
                bool enable;
                u64 cmrr_n, cmrr_m;
            } cmrr;
        } vrr;
        ...
    };

Because cmrr is nested, accessing it directly via crtc_state->cmrr.enable will
fail to compile. Should this be accessed as crtc_state->vrr.cmrr.enable
instead, similar to how it is checked in intel_dp_compute_as_sdp() further
down in this same file?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260923195200.21362-1-xizheTang2005@163.com?part=1

  parent reply	other threads:[~2026-09-23 14:27 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-23 19:51 [PATCH v2] drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async Xizhe Tang
2026-09-23 12:34 ` Jani Nikula
2026-09-23 14:27 ` sashiko-bot [this message]
2026-09-23 14:31 ` Ville Syrjälä
2026-10-05 10:24 ` [PATCH v3 0/3] drm/i915: stop sending a fake Adaptive-Sync SDP Xizhe Tang
2026-10-05 10:24   ` [PATCH v3 1/3] drm/i915/dp: Reserve AS SDP guardband even when VRR is off Xizhe Tang
2026-10-05 10:24   ` [PATCH v3 2/3] drm/i915/dp: Send AS SDP only when VRR or CMRR is enabled Xizhe Tang
2026-10-05 10:24   ` [PATCH v3 3/3] drm/i915/ddi: Program AS SDP before enabling the transcoder Xizhe Tang
  -- strict thread matches above, loose matches on Subject: below --
2026-09-23 19:51 [PATCH v2] drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async Xizhe Tang
2026-09-23 14:26 ` sashiko-bot

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