[PATCH] drm/i915/scaler: Prune YUV420 modes against the max source width

[Arun R Murthy <arun.r.murthy@intel.com>]

skl_scaler_mode_valid() compares the mode's hdisplay against the pipe
scaler maximum source height instead of the maximum source width, so
single pipe YUV420 modes are pruned against the wrong limit.

Commit 3347b55f2c6c ("drm/i915/xe3lpd: Prune modes for YUV420") intended
to reject modes whose hdisplay exceeds the scaler horizontal source
limit, since pipe scaling does not support YUV420 for a source width
above 4096. Comparing against max_h makes the check far too permissive
from display 12 onwards, where max_h is 8192, and too strict on display
11, where max_h is 4096 while the horizontal limit is 5120.

Compare against max_w instead.

Fixes: 3347b55f2c6c ("drm/i915/xe3lpd: Prune modes for YUV420")
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 7994b983d509..7e65c4fffbc0 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -145,7 +145,7 @@ skl_scaler_mode_valid(struct intel_display *display,
 
 	if (num_joined_pipes < 2 && output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
 		skl_scaler_max_src_size(display, &max_w, &max_h);
-		if (mode->hdisplay > max_h)
+		if (mode->hdisplay > max_w)
 			return MODE_NO_420;
 	}
 
-- 
2.25.1