From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/8] drm/i915/psr: Share PSR and PSR2 exit mask
Date: Mon, 24 Sep 2018 17:06:06 -0700 [thread overview]
Message-ID: <20790540.9eGGD8YxfP@dk-thinkpad-x260> (raw)
In-Reply-To: <20180920204327.3513-1-jose.souza@intel.com>
On Thursday, September 20, 2018 1:43:20 PM PDT José Roberto de Souza wrote:
> Now both PSR and PSR2 have the same exit mask, so let's share then
> instead of have the same code 2 times.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 34 ++++++++++++--------------------
> 1 file changed, 13 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c index b6838b525502..358bbcd3b5f3 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -575,28 +575,20 @@ static void intel_psr_enable_source(struct intel_dp
> *intel_dp, else
> chicken &= ~VSC_DATA_SEL_SOFTWARE_CONTROL;
> I915_WRITE(CHICKEN_TRANS(cpu_transcoder), chicken);
> -
> - I915_WRITE(EDP_PSR_DEBUG,
> - EDP_PSR_DEBUG_MASK_MEMUP |
> - EDP_PSR_DEBUG_MASK_HPD |
> - EDP_PSR_DEBUG_MASK_LPSP |
> - EDP_PSR_DEBUG_MASK_MAX_SLEEP |
> - EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
> - } else {
> - /*
> - * Per Spec: Avoid continuous PSR exit by masking MEMUP
> - * and HPD. also mask LPSP to avoid dependency on other
> - * drivers that might block runtime_pm besides
> - * preventing other hw tracking issues now we can rely
> - * on frontbuffer tracking.
> - */
> - I915_WRITE(EDP_PSR_DEBUG,
> - EDP_PSR_DEBUG_MASK_MEMUP |
> - EDP_PSR_DEBUG_MASK_HPD |
> - EDP_PSR_DEBUG_MASK_LPSP |
> - EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
> - EDP_PSR_DEBUG_MASK_MAX_SLEEP);
> }
> +
> + /*
> + * Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD also
> + * mask LPSP to avoid dependency on other drivers that might block
> + * runtime_pm besides preventing other hw tracking issues now we
> + * can rely on frontbuffer tracking.
> + */
Hmm.. I don't think I understand this comment completely and we should update
it. This patch however looks correct,
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> + I915_WRITE(EDP_PSR_DEBUG,
> + EDP_PSR_DEBUG_MASK_MEMUP |
> + EDP_PSR_DEBUG_MASK_HPD |
> + EDP_PSR_DEBUG_MASK_LPSP |
> + EDP_PSR_DEBUG_MASK_DISP_REG_WRITE |
> + EDP_PSR_DEBUG_MASK_MAX_SLEEP);
> }
>
> static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2018-09-25 0:06 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-20 20:43 [PATCH 1/8] drm/i915/psr: Share PSR and PSR2 exit mask José Roberto de Souza
2018-09-20 20:43 ` [PATCH 2/8] drm/i915/psr: Do not set MASK_DISP_REG_WRITE in ICL José Roberto de Souza
2018-09-25 0:16 ` Dhinakaran Pandiyan
2018-09-25 8:00 ` Jani Nikula
2018-09-20 20:43 ` [PATCH 3/8] drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch José Roberto de Souza
2018-09-25 0:28 ` Pandiyan, Dhinakaran
2018-09-25 5:53 ` dhinakaran.pandiyan
2018-09-20 20:43 ` [PATCH 4/8] drm/i915/psr: Remove PSR2 TODO error handling José Roberto de Souza
2018-09-25 6:26 ` dhinakaran.pandiyan
2018-09-20 20:43 ` [PATCH 5/8] drm/i915/psr: Do not enable PSR2 if sink requires selective update X granularity José Roberto de Souza
2018-09-25 6:23 ` dhinakaran.pandiyan
2018-09-25 17:42 ` Souza, Jose
2018-09-20 20:43 ` [PATCH 6/8] drm/i915/psr: Use WA to force HW tracking to exit PSR2 José Roberto de Souza
2018-09-20 22:54 ` Rodrigo Vivi
2018-09-20 23:01 ` Souza, Jose
2018-09-25 5:57 ` dhinakaran.pandiyan
2018-09-20 20:43 ` [PATCH 7/8] drm/i915/psr: Don't tell sink that main link will be active in PSR2 José Roberto de Souza
2018-09-25 6:02 ` dhinakaran.pandiyan
2018-09-26 17:46 ` Souza, Jose
2018-09-26 17:49 ` Souza, Jose
2018-09-20 20:43 ` [PATCH 8/8] drm/i915/psr: Remove alpm from i915_psr José Roberto de Souza
2018-09-25 6:08 ` dhinakaran.pandiyan
2018-09-26 17:57 ` Souza, Jose
2018-09-20 22:19 ` ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/psr: Share PSR and PSR2 exit mask Patchwork
2018-09-20 22:41 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-21 2:55 ` ✓ Fi.CI.IGT: " Patchwork
2018-09-25 0:06 ` Dhinakaran Pandiyan [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20790540.9eGGD8YxfP@dk-thinkpad-x260 \
--to=dhinakaran.pandiyan@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox