Re: [Intel-gfx] GPU RC6 breaks PCIe to PCI bridge connected to CPU PCIe slot on SandyBridge systems

[Simon Farnsworth <simon.farnsworth@onelan.co.uk>]

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On Friday 19 October 2012 17:10:17 Simon Farnsworth wrote:
> Mauro, Linux-Media
> 
> I have an issue where an SAA7134-based TV capture card connected via a PCIe to
> PCI bridge chip works when the GPU is kept out of RC6 state, but sometimes
> "skips" updating lines of the capture when the GPU is in RC6. We've confirmed
> that a CX23418 based chip doesn't have the problem, so the question is whether
> the SAA7134 and the saa7134 driver are at fault, or whether it's the PCIe bus.
> 
> This manifests as a regression, as I had no problems with kernel 3.3 (which
> never enabled RC6 on the Intel GPU), but I do have problems with 3.5 and with
> current Linus git master. I'm happy to try anything, 
> 
> I've attached lspci -vvxxxxx output (suitable for feeding to lspci -F) for
> when the corruption is present (lspci.faulty) and when it's not
> (lspci.working). The speculation is that the SAA7134 is somehow more
> sensitive to the changes in timings that RC6 introduces than the CX23418, and
> that someone who understands the saa7134 driver might be able to make it less
> sensitive.
> 
And timings are definitely the problem; I have a userspace provided pm_qos
request asking for 0 exit latency, but I can see CPU cores entering C6. I'll
take this problem to an appropriate list.

There is still be a bug in the SAA7134 driver, as the card clearly wants a
pm_qos request when streaming to stop the DMA latency becoming too high; this
doesn't directly affect me, as my userspace always requests minimal DMA
latency anyway, so consider this message as just closing down the thread for
now, and as a marker for the future (if people see such corruption, the
saa7134 driver needs a pm_qos request when streaming that isn't currently
present).
-- 
Simon Farnsworth
Software Engineer
ONELAN Ltd
http://www.onelan.com

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