From: John Harrison <john.c.harrison@intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
<intel-gfx@lists.freedesktop.org>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/7] drm/i915/uc: fetch uc firmwares for each GT
Date: Fri, 30 Sep 2022 15:49:11 -0700 [thread overview]
Message-ID: <2430657b-8f4d-4260-71dd-505d85023fe1@intel.com> (raw)
In-Reply-To: <20220922221117.458087-3-daniele.ceraolospurio@intel.com>
On 9/22/2022 15:11, Daniele Ceraolo Spurio wrote:
> The FW binaries are independently loaded on each GT. On MTL, the memory
> is shared so we could potentially re-use a single allocation, but on
> discrete multi-gt platforms we are going to need independent copies,
> so it is easier to do the same on MTL as well, given that the amount
> of duplicated memory is relatively small (~500K).
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: John Harrison <john.c.harrison@intel.com>
> Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 88df9a35e0fe..a5b192ac885c 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1140,7 +1140,8 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
> if (ret)
> return ret;
>
> - intel_uc_fetch_firmwares(&to_gt(dev_priv)->uc);
> + for_each_gt(gt, dev_priv, i)
> + intel_uc_fetch_firmwares(>->uc);
> intel_wopcm_init(&dev_priv->wopcm);
>
> ret = i915_init_ggtt(dev_priv);
next prev parent reply other threads:[~2022-09-30 22:49 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 22:11 [Intel-gfx] [PATCH 0/7] drm/i915: prepare for uC loading on MTL Daniele Ceraolo Spurio
2022-09-22 22:11 ` [Intel-gfx] [PATCH 1/7] drm/i915/huc: only load HuC on GTs that have VCS engines Daniele Ceraolo Spurio
2022-09-23 10:53 ` Tvrtko Ursulin
2022-09-23 15:41 ` Ceraolo Spurio, Daniele
2022-09-26 16:15 ` Tvrtko Ursulin
2022-09-26 16:28 ` Ceraolo Spurio, Daniele
2022-09-27 9:58 ` Iddamsetty, Aravind
2022-09-22 22:11 ` [Intel-gfx] [PATCH 2/7] drm/i915/uc: fetch uc firmwares for each GT Daniele Ceraolo Spurio
2022-09-30 22:49 ` John Harrison [this message]
2022-09-22 22:11 ` [Intel-gfx] [PATCH 3/7] drm/i915/uc: use different ggtt pin offsets for uc loads Daniele Ceraolo Spurio
2022-09-30 23:24 ` John Harrison
2022-09-30 23:42 ` Ceraolo Spurio, Daniele
2022-10-10 19:18 ` John Harrison
2022-09-22 22:11 ` [Intel-gfx] [PATCH 4/7] drm/i915/guc: Add GuC deprivilege feature to MTL Daniele Ceraolo Spurio
2022-09-30 23:33 ` John Harrison
2022-09-22 22:11 ` [Intel-gfx] [PATCH 5/7] drm/i915/mtl: Handle wopcm per-GT and limit calculations Daniele Ceraolo Spurio
2022-09-23 9:24 ` Jani Nikula
2022-09-23 15:34 ` Ceraolo Spurio, Daniele
2022-09-22 22:11 ` [Intel-gfx] [PATCH 6/7] drm/i915/guc: define media GT GuC send regs Daniele Ceraolo Spurio
2022-10-01 0:26 ` John Harrison
2022-09-22 22:11 ` [Intel-gfx] [PATCH 7/7] drm/i915/guc: handle interrupts from media GuC Daniele Ceraolo Spurio
2022-09-28 0:10 ` Matt Roper
2022-09-28 0:22 ` Ceraolo Spurio, Daniele
2022-09-28 18:07 ` Matt Roper
2022-09-28 18:25 ` Ceraolo Spurio, Daniele
2022-09-23 1:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: prepare for uC loading on MTL Patchwork
2022-09-23 1:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-23 1:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-23 9:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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