From: Nirmoy Das <nirmoy.das@intel.com>
To: Andi Shyti <andi.shyti@linux.intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Split gt cache flushing and gt idling functions
Date: Thu, 7 Sep 2023 11:04:33 +0200 [thread overview]
Message-ID: <277afcee-b956-4b21-7d79-a973a4591192@intel.com> (raw)
In-Reply-To: <20230905193614.69771-2-andi.shyti@linux.intel.com>
On 9/5/2023 9:36 PM, Andi Shyti wrote:
> In preparation for multi-gt cache flushing debugfs interface,
> split the cache dropping function and gt idling.
>
> Based on a patch by Tvrtko.
>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 32 +++++++++++++++++++++--------
> 1 file changed, 24 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 7a90a2e32c9f1..3dfe8a8b7cdfe 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -703,11 +703,25 @@ i915_drop_caches_get(void *data, u64 *val)
> return 0;
> }
>
> +static int gt_idle(struct intel_gt *gt, u64 val)
> +{
> + if (val & (DROP_RETIRE | DROP_IDLE))
> + intel_gt_retire_requests(gt);
> +
> + if (val & DROP_IDLE) {
> + int ret;
> +
> + ret = intel_gt_pm_wait_for_idle(gt);
return intel_gt_pm_wait_for_idle(gt) should work fine.
> + if (ret)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> static int
> gt_drop_caches(struct intel_gt *gt, u64 val)
> {
> - int ret;
> -
> if (val & DROP_RESET_ACTIVE &&
> wait_for(intel_engines_are_idle(gt), 200))
> intel_gt_set_wedged(gt);
> @@ -716,13 +730,9 @@ gt_drop_caches(struct intel_gt *gt, u64 val)
> intel_gt_retire_requests(gt);
>
> if (val & (DROP_IDLE | DROP_ACTIVE)) {
> - ret = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
> - if (ret)
> - return ret;
> - }
> + int ret;
>
> - if (val & DROP_IDLE) {
> - ret = intel_gt_pm_wait_for_idle(gt);
> + ret = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
> if (ret)
> return ret;
> }
> @@ -746,10 +756,16 @@ i915_drop_caches_set(void *data, u64 val)
> drm_dbg(&i915->drm, "Dropping caches: 0x%08llx [0x%08llx]\n",
> val, val & DROP_ALL);
>
> + /* Flush all the active requests across both GT ... */
For now it is just GT0 so this comment should be in next patch ?
> ret = gt_drop_caches(to_gt(i915), val);
> if (ret)
> return ret;
>
> + /* ... then wait for idle as there may be cross-gt wakerefs. */
same as above.
Regards,
Nirmoy
> + ret = gt_idle(to_gt(i915), val);
> + if (ret)
> + return ret;
> +
> fs_reclaim_acquire(GFP_KERNEL);
> flags = memalloc_noreclaim_save();
> if (val & DROP_BOUND)
next prev parent reply other threads:[~2023-09-07 9:04 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-05 19:36 [Intel-gfx] [PATCH 0/2] Drop caches per GT Andi Shyti
2023-09-05 19:36 ` [Intel-gfx] [PATCH 1/2] drm/i915: Split gt cache flushing and gt idling functions Andi Shyti
2023-09-07 9:04 ` Nirmoy Das [this message]
2023-09-07 9:57 ` Andi Shyti
2023-09-05 19:36 ` [Intel-gfx] [PATCH 2/2] drm/i915: When asked to drop the cache, do it per GT Andi Shyti
2023-09-06 1:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Drop caches " Patchwork
2023-09-06 3:14 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-09-06 11:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Drop caches per GT (rev2) Patchwork
2023-09-06 15:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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