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From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Hogander, Jouni" <jouni.hogander@intel.com>
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable
Date: Wed, 9 Mar 2022 17:58:19 +0000	[thread overview]
Message-ID: <29df9c0845990c7e35e9a47ae0ebbfc0bc76a0a4.camel@intel.com> (raw)
In-Reply-To: <501420c9c41f3ad7e136fa0e36b43c587257a2f8.camel@intel.com>

On Wed, 2022-03-09 at 13:51 +0000, Hogander, Jouni wrote:
> Hello Jose,
> 
> See my question/comment below.
> 
> On Tue, 2022-03-08 at 07:41 -0800, José Roberto de Souza wrote:
> > If a error happens and sink_not_reliable is set, PSR should be
> > disabled
> > for good but that is not happening.
> > It would be disabled by the function handling the PSR error but then
> > on the next fastset it would be enabled again in
> > _intel_psr_post_plane_update().
> > It would only be disabled for good in the next modeset where has_psr
> > will be set false.
> 
> How about invalidate/flush? If you get error between
> intel_psr_invalidate and intel_psr_flush psr is activated
> even sink_not_reliable is true?

enabled != activated.

flush and invalidate functions checks if PSR is enabled, if not it returns and do a thing.

> 
> > 
> > Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if
> > there is active planes")
> > Reported-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> > Reported-by: Charlton Lin <charlton.lin@intel.com>
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index bbd581ed08159..cd05e5fdc8ca9 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1853,6 +1853,9 @@ static void _intel_psr_post_plane_update(const
> > struct intel_atomic_state *state,
> > 
> >               mutex_lock(&psr->lock);
> > 
> > +             if (psr->sink_not_reliable)
> > +                     continue;
> > +
> >               drm_WARN_ON(&dev_priv->drm, psr->enabled &&
> > !crtc_state->active_planes);
> > 
> >               /* Only enable if there is active planes */
> 
> BR,
> 
> Jouni Högander


  reply	other threads:[~2022-03-09 17:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-08 15:41 [Intel-gfx] [PATCH 1/2] Revert "drm/i915/edp: Ignore short pulse when panel powered off" José Roberto de Souza
2022-03-08 15:41 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza
2022-03-09 13:51   ` Hogander, Jouni
2022-03-09 17:58     ` Souza, Jose [this message]
2022-03-08 23:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] Revert "drm/i915/edp: Ignore short pulse when panel powered off" Patchwork
2022-03-09  7:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-03-10 20:05 [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP José Roberto de Souza
2022-03-10 20:05 ` [Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable José Roberto de Souza

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