From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, ville.syrjala@linux.intel.com
Subject: Re: [PATCH] drm/i915: Read CHV_PLL_DW8 from the correct offset
Date: 11 Mar 2015 19:11:27 -0700 [thread overview]
Message-ID: <2d8c1b$k7druk@fmsmga001.fm.intel.com> (raw)
In-Reply-To: <1426107128-779-1-git-send-email-ville.syrjala@linux.intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5936
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -15 281/281 266/281
ILK -1 308/308 307/308
SNB -1 284/284 283/284
IVB 375/375 375/375
BYT 294/294 294/294
HSW -1 384/384 383/384
BDW 315/315 315/315
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gem_fence_thrash_bo-write-verify-none PASS(3) FAIL(1)
*PNV igt_gem_fence_thrash_bo-write-verify-x PASS(3) FAIL(1)
*PNV igt_gem_fence_thrash_bo-write-verify-y PASS(3) FAIL(1)
PNV igt_gem_userptr_blits_coherency-sync CRASH(5)PASS(2) CRASH(1)
PNV igt_gen3_render_linear_blits FAIL(3)PASS(1) FAIL(1)
PNV igt_gen3_render_mixed_blits FAIL(2)PASS(2) FAIL(1)
PNV igt_gen3_render_tiledx_blits FAIL(4)PASS(1) FAIL(1)
PNV igt_gem_fence_thrash_bo-write-verify-threaded-none CRASH(2)PASS(4) CRASH(1)
*PNV igt_gem_partial_pwrite_pread_reads PASS(2) NRUN(1)
*PNV igt_gem_partial_pwrite_pread_reads-display PASS(2) NRUN(1)
*PNV igt_gem_pwrite_pread_display-pwrite-blt-gtt_mmap-performance PASS(2) NRUN(1)
*PNV igt_gem_ringfill_blitter PASS(2) NRUN(1)
*PNV igt_gem_ringfill_blitter-interruptible PASS(2) NRUN(1)
*PNV igt_gem_tiled_pread_pwrite FAIL(1)PASS(2) NRUN(1)
*PNV igt_gem_userptr_blits_forked-sync-mempressure-interruptible PASS(2) NRUN(1)
*ILK igt_gem_unfence_active_buffers PASS(3) DMESG_WARN(1)PASS(1)
*SNB igt_gem_flink_bad-open PASS(2) DMESG_WARN(1)PASS(1)
*HSW igt_pm_rpm_reg-read-ioctl PASS(2) DMESG_FAIL(1)PASS(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-03-12 2:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-11 20:52 [PATCH] drm/i915: Read CHV_PLL_DW8 from the correct offset ville.syrjala
2015-03-12 2:11 ` shuang.he [this message]
2015-03-12 3:20 ` Todd Previte
2015-03-12 9:53 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='2d8c1b$k7druk@fmsmga001.fm.intel.com' \
--to=shuang.he@intel.com \
--cc=ethan.gao@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox