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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Tvrtko Ursulin <tursulin@ursulin.net>,
	Intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Subject: Re: [RFC 00/14] i915 PMU and engine busy stats
Date: Thu, 20 Jul 2017 10:03:58 +0100	[thread overview]
Message-ID: <33a073d8-20ec-28f6-bc62-1598bfd03456@linux.intel.com> (raw)
In-Reply-To: <150046593065.30670.4634718318350495747@mail.alporthouse.com>


On 19/07/2017 13:05, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2017-07-18 15:36:04)
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> Rough sketch of the idea I mentioned a few times to various people - merging
>> the engine busyness tracking with Chris i915 PMU RFC.
>>
>> First patch is the actual PMU RFC by Chris. It is followed by some cleanup
>> patches, then come a few improvements, cheap execlists engine busyness tracking,
>> debugfs view for the same, and finally the i915 PMU is extended to use this
>> instead of timer based mmio sampling.
>>
>> This makes it cheaper and also more accurate since engine busyness is not
>> derived via sampling.
>>
>> But I haven't figure out the perf API yet. For example is it possible to access
>> our events in an usable fashion via perf top/stat or something? Do we want to
>> make the events discoverable as I did (patch 8).
> 
> In my dreams I have gpu activity in the same perf timechart as gpu
> activity. But that can be mostly by the request tracepoints, but still
> overlaying cpu/gpu activity is desirable and more importantly we want to
> coordinate with nouveau/amdgpu so that such interfaces are as agnostic
> as possible. There are definitely a bunch of global features in common
> for all (engine enumeration & activity, mempool enumeration, size &
> activty, power usage?). But the key question is how do we build for the
> future? Split the event id range into common/driver?

I don't know if going for common events would be workable. A few metrics 
sounds like it could be generic, but I am not sure there would be more 
than a couple where that would be future proof. Also is the coordination 
effort (no one else seems to implement a perf interface at the moment) 
worth it at the current time? I am not sure.

>> I could not find much (any?) kernel API level documentation for perf.
> 
> There isn't much indeed. Given that we now have a second pair of eyes go
> over the sampling and improve its interaction with i915, we should start
> getting PeterZ involved to check the interaction with perf.

Okay, I guess another cleanup pass and then I can do that.

In the meantime do you have any good understanding of what kind of 
events are we exposing here? They look weird if I record them and look 
with "perf script", and "perf stat" always reports zeroes for them. But 
they still work from the overlay tool. So it is a bit of a mystery to me 
what they really are.
>> Btw patch series actually works since intel-gpu-overlay can use these events
>> when they are available.
>>
>> Chris Wilson (1):
>>    RFC drm/i915: Expose a PMU interface for perf queries
> 
> One thing I would like is for any future interface (including this
> engine/class/event id) to use the engine class/instance mapping.

I was thinking about that myself. I can do it in the next cleanup pass.

Regards,

Tvrtko
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  reply	other threads:[~2017-07-20  9:04 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-18 14:36 [RFC 00/14] i915 PMU and engine busy stats Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 01/14] RFC drm/i915: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-07-19  9:53   ` Kamble, Sagar A
2017-07-20  8:55     ` Tvrtko Ursulin
2017-07-25  1:09   ` Ben Widawsky
2017-07-18 14:36 ` [RFC 02/14] drm/i915/pmu: Add VCS2 engine to the PMU uAPI Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 03/14] drm/i915/pmu: Add queued samplers " Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 04/14] drm/i915/pmu: Decouple uAPI engine ids Tvrtko Ursulin
2017-07-25  1:18   ` Ben Widawsky
2017-07-26  9:04     ` Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 05/14] drm/i915/pmu: Helper to extract engine and sampler from PMU config Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 06/14] drm/i915/pmu: Only sample enabled samplers Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 07/14] drm/i915/pmu: Add fake regs Tvrtko Ursulin
2017-07-25  1:20   ` Ben Widawsky
2017-07-26  9:07     ` Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 08/14] drm/i915/pmu: Expose events in sysfs Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 09/14] drm/i915/pmu: Suspend sampling when GPU is idle Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 10/14] drm/i915: Wrap context schedule notification Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 11/14] drm/i915: Engine busy time tracking Tvrtko Ursulin
2017-07-18 15:19   ` Chris Wilson
2017-07-19  9:12     ` Tvrtko Ursulin
2017-07-19 10:46       ` Chris Wilson
2017-07-18 14:36 ` [RFC 12/14] drm/i915: Interface for controling engine stats collection Tvrtko Ursulin
2017-07-18 15:22   ` Chris Wilson
2017-07-19  9:30     ` Tvrtko Ursulin
2017-07-19 11:04       ` Chris Wilson
2017-07-20  9:07         ` Tvrtko Ursulin
2017-07-18 15:43   ` Chris Wilson
2017-07-18 18:43   ` Chris Wilson
2017-07-19  9:34   ` Tvrtko Ursulin
2017-07-25  1:28     ` Ben Widawsky
2017-07-18 14:36 ` [RFC 13/14] drm/i915: Export engine busy stats in debugfs Tvrtko Ursulin
2017-07-18 14:36 ` [RFC 14/14] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-07-18 14:58 ` ✓ Fi.CI.BAT: success for i915 PMU and engine busy stats Patchwork
2017-07-19 12:05 ` [RFC 00/14] " Chris Wilson
2017-07-20  9:03   ` Tvrtko Ursulin [this message]
2017-07-26 10:34     ` Tvrtko Ursulin
2017-07-26 10:55       ` Chris Wilson

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