From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: Alexander Usyskin <alexander.usyskin@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Tomas Winkler <tomas.winkler@intel.com>,
linux-kernel@vger.kernel.org,
Vitaly Lubart <vitaly.lubart@intel.com>
Subject: Re: [Intel-gfx] [PATCH v11 1/5] drm/i915/gsc: add gsc as a mei auxiliary device
Date: Wed, 16 Mar 2022 18:11:53 -0700 [thread overview]
Message-ID: <34a38062-cf2f-f76a-cf49-1e59f8a81e2c@intel.com> (raw)
In-Reply-To: <20220315131157.3972238-2-alexander.usyskin@intel.com>
<snip>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ddbc7a685a50..63c56d668963 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -976,6 +976,8 @@
> #define GEN12_COMPUTE2_RING_BASE 0x1e000
> #define GEN12_COMPUTE3_RING_BASE 0x26000
> #define BLT_RING_BASE 0x22000
> +#define DG1_GSC_HECI1_BASE 0x00258000
> +#define DG1_GSC_HECI2_BASE 0x00259000
You ended up keeping the HECI1 define. Not a blocker, so:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
>
>
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index f9b955810593..576d15a04c9e 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -141,6 +141,8 @@ enum intel_ppgtt_type {
> func(has_flat_ccs); \
> func(has_global_mocs); \
> func(has_gt_uc); \
> + func(has_heci_pxp); \
> + func(has_heci_gscfi); \
> func(has_guc_deprivilege); \
> func(has_l3_dpf); \
> func(has_llc); \
> diff --git a/include/linux/mei_aux.h b/include/linux/mei_aux.h
> new file mode 100644
> index 000000000000..587f25128848
> --- /dev/null
> +++ b/include/linux/mei_aux.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (c) 2022, Intel Corporation. All rights reserved.
> + */
> +#ifndef _LINUX_MEI_AUX_H
> +#define _LINUX_MEI_AUX_H
> +
> +#include <linux/auxiliary_bus.h>
> +
> +struct mei_aux_device {
> + struct auxiliary_device aux_dev;
> + int irq;
> + struct resource bar;
> +};
> +
> +#define auxiliary_dev_to_mei_aux_dev(auxiliary_dev) \
> + container_of(auxiliary_dev, struct mei_aux_device, aux_dev)
> +
> +#endif /* _LINUX_MEI_AUX_H */
next prev parent reply other threads:[~2022-03-17 1:12 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-15 13:11 [Intel-gfx] [PATCH v11 0/5] Add driver for GSC controller Alexander Usyskin
2022-03-15 13:11 ` [Intel-gfx] [PATCH v11 1/5] drm/i915/gsc: add gsc as a mei auxiliary device Alexander Usyskin
2022-03-17 1:11 ` Ceraolo Spurio, Daniele [this message]
2022-03-15 13:11 ` [Intel-gfx] [PATCH v11 2/5] mei: add support for graphics system controller (gsc) devices Alexander Usyskin
2022-03-17 1:15 ` Ceraolo Spurio, Daniele
2022-03-15 13:11 ` [Intel-gfx] [PATCH v11 3/5] mei: gsc: setup char driver alive in spite of firmware handshake failure Alexander Usyskin
2022-03-15 13:11 ` [Intel-gfx] [PATCH v11 4/5] mei: gsc: add runtime pm handlers Alexander Usyskin
2022-03-22 16:56 ` Rodrigo Vivi
2022-03-15 13:11 ` [Intel-gfx] [PATCH v11 5/5] mei: gsc: retrieve the firmware version Alexander Usyskin
2022-03-15 13:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add driver for GSC controller (rev11) Patchwork
2022-03-15 13:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-15 14:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-15 15:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-03-22 20:10 ` [Intel-gfx] [PATCH v11 0/5] Add driver for GSC controller Ceraolo Spurio, Daniele
2022-03-28 7:39 ` Usyskin, Alexander
2022-03-28 17:04 ` Ceraolo Spurio, Daniele
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