Re: [Intel-gfx] [v4] drm/i915/display: Extend DP HDR support to hsw+

["Shankar, Uma" <uma.shankar@intel.com>]

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, March 24, 2022 6:31 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [v4] drm/i915/display: Extend DP HDR support to hsw+
> 
> On Thu, Mar 24, 2022 at 05:34:38PM +0530, Uma Shankar wrote:
> > HSW+ platforms are able to send out HDR Metadata SDP DIP
> > packet as GMP. Hence, extending the support for HDR on DP encoders for
> > the same.
> >
> > v2: Limited to non eDP ports on hsw/bdw and removed it for lspcon as
> > it is done separately (suggested by Ville)
> >
> > v3: Added helper and limited eDP restriction to port A (Ville)
> >
> > v4: Dropped some redundant checks (Ville)
> >
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5389
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Change pushed to drm-intel-next. Thanks Ville for the review and feedback.

Regards,
Uma Shankar

> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 21 ++++++++++++++++++++-
> >  1 file changed, 20 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 9e19165fd175..fdcb169adb54 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4913,6 +4913,25 @@ bool intel_dp_is_port_edp(struct drm_i915_private
> *dev_priv, enum port port)
> >  	return intel_bios_is_port_edp(dev_priv, port);  }
> >
> > +static bool
> > +has_gamut_metadata_dip(struct drm_i915_private *i915, enum port port)
> > +{
> > +	if (intel_bios_is_lspcon_present(i915, port))
> > +		return false;
> > +
> > +	if (DISPLAY_VER(i915) >= 11)
> > +		return true;
> > +
> > +	if (port == PORT_A)
> > +		return false;
> > +
> > +	if (IS_HASWELL(i915) || IS_BROADWELL(i915) ||
> > +	    DISPLAY_VER(i915) >= 9)
> > +		return true;
> > +
> > +	return false;
> > +}
> > +
> >  static void
> >  intel_dp_add_properties(struct intel_dp *intel_dp, struct
> > drm_connector *connector)  { @@ -4939,7 +4958,7 @@
> > intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
> >  		intel_attach_dp_colorspace_property(connector);
> >  	}
> >
> > -	if (IS_GEMINILAKE(dev_priv) || DISPLAY_VER(dev_priv) >= 11)
> > +	if (has_gamut_metadata_dip(dev_priv, port))
> >  		drm_object_attach_property(&connector->base,
> >  					   connector->dev-
> >mode_config.hdr_output_metadata_property,
> >  					   0);
> > --
> > 2.25.1
> 
> --
> Ville Syrjälä
> Intel