public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Kahola, Mika" <mika.kahola@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 2/6] drm/i915: Do intel_dpll_readout_hw_state() after encoder readout
Date: Mon, 8 Mar 2021 11:43:11 +0000	[thread overview]
Message-ID: <41b689150afe43588196e1bac877fdcf@intel.com> (raw)
In-Reply-To: <20210225161225.30746-1-ville.syrjala@linux.intel.com>

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, February 25, 2021 6:12 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 2/6] drm/i915: Do
> intel_dpll_readout_hw_state() after encoder readout
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The clock readout for DDI encoders needs to moved into the encoders.
> To that end intel_dpll_readout_hw_state() needs to happen after the
> encoder readout as otherwise it can't correctly populate the PLL
> crtc_mask/active_mask bitmasks.
> 
> v2: Populate DPLL ref clocks before the encoder->get_config()
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c  | 5 +++--
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 9 ++++++---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 1 +
>  3 files changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d0da88751c72..faf9507c9da2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12908,6 +12908,7 @@ int intel_modeset_init_nogem(struct
> drm_i915_private *i915)
> 
>  	intel_update_czclk(i915);
>  	intel_modeset_init_hw(i915);
> +	intel_dpll_update_ref_clks(i915);
> 
>  	intel_hdcp_component_init(i915);
> 
> @@ -13444,8 +13445,6 @@ static void
> intel_modeset_readout_hw_state(struct drm_device *dev)
> 
>  	readout_plane_state(dev_priv);
> 
> -	intel_dpll_readout_hw_state(dev_priv);
> -
>  	for_each_intel_encoder(dev, encoder) {
>  		pipe = 0;
> 
> @@ -13480,6 +13479,8 @@ static void
> intel_modeset_readout_hw_state(struct drm_device *dev)
>  			    pipe_name(pipe));
>  	}
> 
> +	intel_dpll_readout_hw_state(dev_priv);
> +
>  	drm_connector_list_iter_begin(dev, &conn_iter);
>  	for_each_intel_connector_iter(connector, &conn_iter) {
>  		if (connector->get_hw_state(connector)) { diff --git
> a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 529b1d569af2..ac6460962e29 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4612,12 +4612,15 @@ static void readout_dpll_hw_state(struct
> drm_i915_private *i915,
>  		    pll->info->name, pll->state.crtc_mask, pll->on);  }
> 
> -void intel_dpll_readout_hw_state(struct drm_i915_private *i915)
> +void intel_dpll_update_ref_clks(struct drm_i915_private *i915)
>  {
> -	int i;
> -
>  	if (i915->dpll.mgr && i915->dpll.mgr->update_ref_clks)
>  		i915->dpll.mgr->update_ref_clks(i915);
> +}
> +
> +void intel_dpll_readout_hw_state(struct drm_i915_private *i915) {
> +	int i;
> 
>  	for (i = 0; i < i915->dpll.num_shared_dpll; i++)
>  		readout_dpll_hw_state(i915, &i915->dpll.shared_dplls[i]);
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 2eb7618ef957..81e67639dadb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -410,6 +410,7 @@ void intel_enable_shared_dpll(const struct
> intel_crtc_state *crtc_state);  void intel_disable_shared_dpll(const struct
> intel_crtc_state *crtc_state);  void intel_shared_dpll_swap_state(struct
> intel_atomic_state *state);  void intel_shared_dpll_init(struct drm_device
> *dev);
> +void intel_dpll_update_ref_clks(struct drm_i915_private *dev_priv);
>  void intel_dpll_readout_hw_state(struct drm_i915_private *dev_priv);  void
> intel_dpll_sanitize_state(struct drm_i915_private *dev_priv);
> 
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-03-08 11:43 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24 14:42 [Intel-gfx] [PATCH 0/6] drm/i915: Move DDI clock readout to encoder->get_config() Ville Syrjala
2021-02-24 14:42 ` [Intel-gfx] [PATCH 1/6] drm/i915: Call primary encoder's .get_config() from MST .get_config() Ville Syrjala
2021-03-04 10:42   ` Kahola, Mika
2021-02-24 14:42 ` [Intel-gfx] [PATCH 2/6] drm/i915: Do intel_dpll_readout_hw_state() after encoder readout Ville Syrjala
2021-02-25 16:12   ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2021-03-08 11:43     ` Kahola, Mika [this message]
2021-03-04 10:43   ` [Intel-gfx] [PATCH " Kahola, Mika
2021-02-24 14:42 ` [Intel-gfx] [PATCH 3/6] drm/i915: Use pipes instead crtc indices in PLL state tracking Ville Syrjala
2021-03-04 10:52   ` Kahola, Mika
2021-02-24 14:42 ` [Intel-gfx] [PATCH 4/6] drm/i915: Move DDI clock readout to encoder->get_config() Ville Syrjala
2021-03-08 13:11   ` Kahola, Mika
2021-02-24 14:42 ` [Intel-gfx] [PATCH 5/6] drm/i915: Add encoder->is_clock_enabled() Ville Syrjala
2021-03-08 13:16   ` Kahola, Mika
2021-02-24 14:42 ` [Intel-gfx] [PATCH 6/6] drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms Ville Syrjala
2021-03-08 13:17   ` Kahola, Mika
2021-02-24 18:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Move DDI clock readout to encoder->get_config() Patchwork
2021-02-24 19:28 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-25 16:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Move DDI clock readout to encoder->get_config() (rev2) Patchwork
2021-02-25 17:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-25 18:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=41b689150afe43588196e1bac877fdcf@intel.com \
    --to=mika.kahola@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox