From: Jim Gettys <jg@freedesktop.org>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] i915: Initialize panel timing registers if VBIOS did not.
Date: Fri, 08 Oct 2010 16:11:47 -0400 [thread overview]
Message-ID: <4CAF7B03.7060200@freedesktop.org> (raw)
In-Reply-To: <AANLkTi=a+0ghGTfRP+27FYwbFjyo9FUc0uzHANSaiaTo@mail.gmail.com>
On 10/08/2010 02:35 PM, Bryan Freed wrote:
> I took a look at several panel datasheets I found around here, and the one
> issue some of them mentioned is that these timings (particularly T2 on
> powerup and T3 on powerdown) are used to prevent latch-up.
>
> That makes sense. We do not want to drive pixels to a device that has 0V on
> VDD. This change sets a default of 40ms / 35ms (as per our panel of
> interest) in the event we see both values at 0ms. So this change can only
> make things better (ie, latch-up less likely).
Yeah, there is a minimum frame rate you need to drive LCD's at, which is
somewhat dependent on the details of the liquid crystal material itself;
you really don't want them to crystallise fully. I know from working
with Mary Lou Jepson on the OLPC LCD panel that 25hz was fully safe for
that technology (and the liquid crystals themselves weren't anything
unusual in that panel). She is entirely expert at LCD technology.
Having some sanity check seems good and correlates with what I know, to
handle the case of not being given any valid information.
- Jim
>
> One "weakness" is that I do not explicitly check the T2 and T3 timings in
> the PP_ON and PP_OFF registers. I try to detect a lack of VBIOS
> initialization by checking for 0 valued registers. I rather think this is
> the right approach.
>
> The other timings in these registers are cosmetic. For example, "do not
> turn on the backlight before the panel is driving its pixels which is T5
> after turning on the pixel clock."
>
> bryan.
>
> On Fri, Oct 8, 2010 at 2:58 AM, Chris Wilson<chris@chris-wilson.co.uk>wrote:
>
>> On Thu, 7 Oct 2010 17:05:46 -0700, Bryan Freed<bfreed@chromium.org>
>> wrote:
>>> The time between start of the pixel clock and backlight enable is a basic
>>> panel timing constraint. If the Panel Power On/Off registers are found
>>> to be 0, assume we are booting without VBIOS initialization and set these
>>> registers to something reasonable.
>>
>> That looks cleaner. Obviously my only concern is what happens if we ever
>> see a second device that posts without setting up the registers. We may as
>> well compile in the VBT for every single manufactured device... Or we
>> could add a ROM table the manufacturers must include that provides the
>> necessary register values for their hardware. There must be some
>> replacement for the BIOS, a device description table at least?
>>
>> Does any one have a strong "this will damage my hardware" objection? Are
>> the values safe enough for *any* device?
>> -Chris
>>
>> --
>> Chris Wilson, Intel Open Source Technology Centre
>>
>
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2010-10-08 20:20 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-08 0:05 [PATCH] i915: Initialize panel timing registers if VBIOS did not Bryan Freed
2010-10-08 9:58 ` Chris Wilson
2010-10-08 18:35 ` Bryan Freed
2010-10-08 20:11 ` Jim Gettys [this message]
2010-10-08 20:28 ` Chris Wilson
2010-10-08 21:17 ` Jesse Barnes
2010-10-13 21:00 ` Olof Johansson
2010-10-14 8:22 ` Chris Wilson
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