From: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Ramalingam C" <ramalingam.c@intel.com>
Cc: dri-devel <dri-devel@lists.freedesktop.org>,
intel-gfx <intel-gfx@lists.freedesktop.org>,
Daniel Vetter <daniel@ffwll.ch>, CQ Tang <cq.tang@intel.com>,
Matthew Auld <matthew.auld@intel.com>,
lucas.demarchi@intel.com, rodrigo.vivi@intel.com,
Hellstrom Thomas <thomas.hellstrom@intel.com>,
Matt Roper <matthew.d.roper@intel.com>,
Simon Ser <contact@emersion.fr>,
Pekka Paalanen <ppaalanen@gmail.com>
Subject: Re: [Intel-gfx] [PATCH v2 14/17] uapi/drm/dg2: Format modifier for DG2 unified compression and clear color
Date: Mon, 25 Oct 2021 14:20:02 +0300 [thread overview]
Message-ID: <4b263070-a30e-85fb-d3d7-6983b05ec323@gmail.com> (raw)
In-Reply-To: <YXF6tItZLX4Cn6Aw@intel.com>
On 21.10.2021 17.35, Ville Syrjälä wrote:
> On Thu, Oct 21, 2021 at 07:56:24PM +0530, Ramalingam C wrote:
>> From: Matt Roper <matthew.d.roper@intel.com>
>>
>> DG2 unifies render compression and media compression into a single
>> format for the first time. The programming and buffer layout is
>> supposed to match compression on older gen12 platforms, but the
>> actual compression algorithm is different from any previous platform; as
>> such, we need a new framebuffer modifier to represent buffers in this
>> format, but otherwise we can re-use the existing gen12 compression driver
>> logic.
>>
>> DG2 clear color render compression uses Tile4 layout. Therefore, we need
>> to define a new format modifier for uAPI to support clear color rendering.
>>
>> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Mika Kahola <mika.kahola@intel.com> (v2)
>> Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> cc: Simon Ser <contact@emersion.fr>
>> Cc: Pekka Paalanen <ppaalanen@gmail.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 3 ++
>> .../drm/i915/display/intel_display_types.h | 10 +++-
>> drivers/gpu/drm/i915/display/intel_fb.c | 7 +++
>> .../drm/i915/display/skl_universal_plane.c | 49 +++++++++++++++++--
>> include/uapi/drm/drm_fourcc.h | 30 ++++++++++++
>> 5 files changed, 94 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>> index 9b678839bf2b..2949fe9f5b9f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -1013,6 +1013,9 @@ intel_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
>> cmd->pixel_format);
>> case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
>> case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
>> + case I915_FORMAT_MOD_F_TILED_DG2_RC_CCS:
>> + case I915_FORMAT_MOD_F_TILED_DG2_MC_CCS:
>> + case I915_FORMAT_MOD_F_TILED_DG2_RC_CCS_CC:
>> return lookup_format_info(gen12_ccs_formats,
>> ARRAY_SIZE(gen12_ccs_formats),
>> cmd->pixel_format);
>
> That seems not right. Flat CCS is invisible to the user so the format
> info should not include a CCS plane.
>
I had cleaned out those rc and mc ccs from here long time ago, I wonder
where did they come back from? On my development tree they're not there.
Also I915_FORMAT_MOD_F_TILED_DG2_RC_CCS_CC is here in totally wrong
place, it should have its own gen12_flat_ccs_cc_formats table.
/Juha-Pekka
next prev parent reply other threads:[~2021-10-25 11:20 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-21 14:26 [Intel-gfx] [PATCH v2 00/17] drm/i915/dg2: Enabling 64k page size and flat ccs Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 01/17] drm/i915: Add has_64k_pages flag Ramalingam C
2021-10-22 6:47 ` Lucas De Marchi
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 02/17] drm/i915/xehpsdv: set min page-size to 64K Ramalingam C
2021-10-22 6:47 ` Lucas De Marchi
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 03/17] drm/i915/xehpsdv: enforce min GTT alignment Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 04/17] drm/i915: enforce min page size for scratch Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 05/17] drm/i915/gtt/xehpsdv: move scratch page to system memory Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 06/17] drm/i915/xehpsdv: support 64K GTT pages Ramalingam C
2021-10-22 17:04 ` Matthew Auld
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 07/17] drm/i915: Add vm min alignment support Ramalingam C
2021-10-22 16:56 ` Matthew Auld
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 08/17] drm/i915/selftests: account for min_alignment in GTT selftests Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 09/17] drm/i915/xehpsdv: implement memory coloring Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 10/17] drm/i915/xehpsdv: Add has_flat_ccs to device info Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 11/17] drm/i915/lmem: Enable lmem for platforms with Flat CCS Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 12/17] drm/i915/gt: Clear compress metadata for Xe_HP platforms Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 13/17] drm/i915/dg2: Tile 4 plane format support Ramalingam C
2021-10-21 14:27 ` Lisovskiy, Stanislav
2021-10-26 15:08 ` Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 14/17] uapi/drm/dg2: Format modifier for DG2 unified compression and clear color Ramalingam C
2021-10-21 14:28 ` Simon Ser
2021-10-21 14:35 ` Ville Syrjälä
2021-10-25 11:20 ` Juha-Pekka Heikkila [this message]
2021-10-26 15:44 ` Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 15/17] drm/i915/uapi: document behaviour for DG2 64K support Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 16/17] drm/i915/Flat-CCS: Document on Flat-CCS memory compression Ramalingam C
2021-10-21 14:26 ` [Intel-gfx] [PATCH v2 17/17] Doc/gpu/rfc/i915: i915 DG2 uAPI Ramalingam C
2021-10-21 16:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dg2: Enabling 64k page size and flat ccs (rev2) Patchwork
2021-10-21 16:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-10-21 16:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-10-25 17:31 ` [Intel-gfx] [PATCH v2 00/17] drm/i915/dg2: Enabling 64k page size and flat ccs Robert Beckett
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