From: John Harrison <john.c.harrison@intel.com>
To: Alan Previn <alan.previn.teres.alexis@intel.com>,
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/guc: Add compute reglist for guc err capture
Date: Fri, 21 Oct 2022 11:49:12 -0700 [thread overview]
Message-ID: <4defbceb-810b-fd4c-6887-f55dcbc7b2da@intel.com> (raw)
In-Reply-To: <20221019072930.17755-3-alan.previn.teres.alexis@intel.com>
On 10/19/2022 00:29, Alan Previn wrote:
> We missed this at initial upstream because at that time
> none of the GuC enabled platforms had a compute engine.
> Add this now.
>
> Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> index abf6e5eb711e..c4bee3bc15a9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -169,6 +169,8 @@ static struct __guc_mmio_reg_descr_group default_lists[] = {
> MAKE_REGLIST(default_global_regs, PF, GLOBAL, 0),
> MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> + MAKE_REGLIST(default_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
> @@ -182,6 +184,8 @@ static const struct __guc_mmio_reg_descr_group xe_lpd_lists[] = {
> MAKE_REGLIST(xe_lpd_global_regs, PF, GLOBAL, 0),
> MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_RENDER_CLASS),
> MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_RENDER_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_class_regs, PF, ENGINE_CLASS, GUC_COMPUTE_CLASS),
> + MAKE_REGLIST(xe_lpd_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_COMPUTE_CLASS),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_VIDEO_CLASS),
> MAKE_REGLIST(xe_lpd_vec_class_regs, PF, ENGINE_CLASS, GUC_VIDEOENHANCE_CLASS),
next prev parent reply other threads:[~2022-10-21 18:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-19 7:29 [Intel-gfx] [PATCH v3 0/2] drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types Alan Previn
2022-10-19 7:29 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/guc: Add error-capture init warnings when needed Alan Previn
2022-10-21 19:42 ` John Harrison
2022-10-19 7:29 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/guc: Add compute reglist for guc err capture Alan Previn
2022-10-21 18:49 ` John Harrison [this message]
2022-10-19 8:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Add GuC-Error-Capture-Init coverage of new engine types (rev3) Patchwork
2022-10-19 15:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-24 20:25 ` Teres Alexis, Alan Previn
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