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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Correctly set SFC capability for video engines
Date: Fri, 6 Nov 2020 09:30:05 +0000	[thread overview]
Message-ID: <5004bc0d-1e97-bbf3-ece9-327c61d4d09c@linux.intel.com> (raw)
In-Reply-To: <20201106011842.36203-1-daniele.ceraolospurio@intel.com>


On 06/11/2020 01:18, Daniele Ceraolo Spurio wrote:
> From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> 
> SFC capability of video engines is not set correctly because i915
> is testing for incorrect bits.
> 
> Fixes: c5d3e39caa45 ("drm/i915: Engine discovery query")
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index 3fb52fac0d5d..0b31670343f5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -372,7 +372,8 @@ static void __setup_engine_capabilities(struct intel_engine_cs *engine)
>   		 * instances.
>   		 */
>   		if ((INTEL_GEN(i915) >= 11 &&
> -		     engine->gt->info.vdbox_sfc_access & engine->mask) ||
> +		     (engine->gt->info.vdbox_sfc_access &
> +		      BIT(engine->instance))) ||
>   		    (INTEL_GEN(i915) >= 9 && engine->instance == 0))
>   			engine->uabi_capabilities |=
>   				I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC;
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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  parent reply	other threads:[~2020-11-06  9:30 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-06  1:18 [Intel-gfx] [PATCH] drm/i915: Correctly set SFC capability for video engines Daniele Ceraolo Spurio
2020-11-06  2:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-11-06  4:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-11-06  9:30 ` Tvrtko Ursulin [this message]
2020-11-06 10:02   ` [Intel-gfx] [PATCH] " Chris Wilson
2020-11-06 10:04     ` Chris Wilson
2020-11-06 22:19 ` Matt Roper

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