From: Adam Jackson <ajax@redhat.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/4] drm/dp: Update DPCD defines
Date: Thu, 20 Sep 2012 10:53:35 -0400 [thread overview]
Message-ID: <505B2DEF.1070704@redhat.com> (raw)
In-Reply-To: <CA+gsUGQxT7vBNEeGqmZBeoJHPd95jQPBqdVzQYgwRkbBAkW81w@mail.gmail.com>
On 9/20/12 10:10 AM, Paulo Zanoni wrote:
> 2012/9/18 Adam Jackson <ajax@redhat.com>:
>> Sources: DP, eDP, and DP interop specs, and a VESA slideshow about DP
>> 1.2 for the MST bits.
>
> All I needed to review every bit was DP spec version 1.2.
Lucky you! I don't have a copy.
>> +#define DP_SINK_COUNT 0x200
>> +# define DP_SINK_COUNT_MASK (31 << 0)
>
> My DP spec version 1.2 says "bits 7 and 5:0", but the DP 1.1 spec says
> it's just 5:0 and "Bits 7 = RESERVED". So should we treat bit 7 as the
> most-significant-bit? Notice that this will affect patch 4 of this
> series.
Oh, wild. I guess they did that so they could have twice as many
downstream devices?
> Idea for a follow-up patch: maybe we should try to add some comments
> explaining which bits appeared only in some specific DPCD x.y
> revision?
That's a good idea.
I'll send follow-ups for that, and to make a DP_GET_SINK_COUNT() that
does the right math.
- ajax
next prev parent reply other threads:[~2012-09-20 14:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-18 14:58 [PATCH 1/4] drm: Export drm_probe_ddc() Adam Jackson
2012-09-18 14:58 ` [PATCH 2/4] drm/dp: Update DPCD defines Adam Jackson
2012-09-20 14:10 ` [Intel-gfx] " Paulo Zanoni
2012-09-20 14:53 ` Adam Jackson [this message]
2012-09-18 14:58 ` [PATCH 3/4] drm/i915/dp: Fetch downstream port info if needed during DPCD fetch Adam Jackson
2012-09-20 12:28 ` [Intel-gfx] " Jani Nikula
2012-09-26 12:23 ` Daniel Vetter
2012-09-18 14:58 ` [PATCH 4/4] drm/i915/dp: Be smarter about connection sense for branch devices Adam Jackson
2012-09-18 15:42 ` [Intel-gfx] " Adam Jackson
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