From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: <intel-gfx@lists.freedesktop.org>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/huc: check HW directly for HuC auth status
Date: Wed, 27 Apr 2022 14:01:31 -0700 [thread overview]
Message-ID: <516126dd-238e-89f8-1915-ae45d8284ddd@intel.com> (raw)
In-Reply-To: <20220427002617.1767295-2-daniele.ceraolospurio@intel.com>
On 4/26/2022 5:26 PM, Daniele Ceraolo Spurio wrote:
> The huc_is_authenticated function return is based on our SW tracking of
> the HuC auth status. However, around suspend/resume and reset this can
> go out of sync with the actual HW state, which is why we use
> huc_check_state() to look at the actual HW state. Instead of having this
> duality, just make huc_is_authenticated() return the HW state and use it
> everywhere we need to know if HuC is running.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> drivers/gpu/drm/i915/gt/uc/intel_huc.c | 23 ++++++++++++++---------
> drivers/gpu/drm/i915/gt/uc/intel_huc.h | 5 -----
> 2 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index 556829de9c172..773020e69589a 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -80,6 +80,18 @@ void intel_huc_fini(struct intel_huc *huc)
> intel_uc_fw_fini(&huc->fw);
> }
>
> +static bool huc_is_authenticated(struct intel_huc *huc)
> +{
> + struct intel_gt *gt = huc_to_gt(huc);
> + intel_wakeref_t wakeref;
> + u32 status = 0;
> +
> + with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> + status = intel_uncore_read(gt->uncore, huc->status.reg);
> +
> + return (status & huc->status.mask) == huc->status.value;
> +}
> +
> /**
> * intel_huc_auth() - Authenticate HuC uCode
> * @huc: intel_huc structure
> @@ -96,7 +108,7 @@ int intel_huc_auth(struct intel_huc *huc)
> struct intel_guc *guc = >->uc.guc;
> int ret;
>
> - GEM_BUG_ON(intel_huc_is_authenticated(huc));
> + GEM_BUG_ON(huc_is_authenticated(huc));
It looks like even on gen9 HuC is surviving the reset, so this BUG_ON is
now being triggered. I'm going to just change this to a BUG_ON on
intel_uc_fw_is_running() for now, which would be equivalent to what we
have right now, and in the meantime I'll follow up with the HuC team to
see if we can just skip this (and the huc_fw_upload) if HuC shows up as
already authenticated.
Daniele
>
> if (!intel_uc_fw_is_loaded(&huc->fw))
> return -ENOEXEC;
> @@ -150,10 +162,6 @@ int intel_huc_auth(struct intel_huc *huc)
> */
> int intel_huc_check_status(struct intel_huc *huc)
> {
> - struct intel_gt *gt = huc_to_gt(huc);
> - intel_wakeref_t wakeref;
> - u32 status = 0;
> -
> switch (__intel_uc_fw_status(&huc->fw)) {
> case INTEL_UC_FIRMWARE_NOT_SUPPORTED:
> return -ENODEV;
> @@ -167,10 +175,7 @@ int intel_huc_check_status(struct intel_huc *huc)
> break;
> }
>
> - with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> - status = intel_uncore_read(gt->uncore, huc->status.reg);
> -
> - return (status & huc->status.mask) == huc->status.value;
> + return huc_is_authenticated(huc);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.h b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> index 73ec670800f2b..77d813840d76c 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.h
> @@ -50,11 +50,6 @@ static inline bool intel_huc_is_used(struct intel_huc *huc)
> return intel_uc_fw_is_available(&huc->fw);
> }
>
> -static inline bool intel_huc_is_authenticated(struct intel_huc *huc)
> -{
> - return intel_uc_fw_is_running(&huc->fw);
> -}
> -
> void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p);
>
> #endif
next prev parent reply other threads:[~2022-04-27 21:02 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-27 0:26 [Intel-gfx] [PATCH 0/4] drm/i915: Prepare for GSC-loaded HuC Daniele Ceraolo Spurio
2022-04-27 0:26 ` [Intel-gfx] [PATCH 1/4] drm/i915/huc: check HW directly for HuC auth status Daniele Ceraolo Spurio
2022-04-27 12:39 ` Rodrigo Vivi
2022-04-27 21:01 ` Ceraolo Spurio, Daniele [this message]
2022-04-27 0:26 ` [Intel-gfx] [PATCH 2/4] drm/i915/huc: Add fetch support for gsc-loaded HuC binary Daniele Ceraolo Spurio
2022-04-29 18:20 ` [Intel-gfx] [2/4] " Teres Alexis, Alan Previn
2022-04-27 0:26 ` [Intel-gfx] [PATCH 3/4] drm/i915/huc: Prepare for GSC-loaded HuC Daniele Ceraolo Spurio
2022-04-29 18:39 ` [Intel-gfx] [3/4] " Teres Alexis, Alan Previn
2022-04-27 0:26 ` [Intel-gfx] [PATCH 4/4] drm/i915/huc: Don't fail the probe if HuC init fails Daniele Ceraolo Spurio
2022-04-27 12:42 ` Rodrigo Vivi
2022-04-27 0:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Prepare for GSC-loaded HuC Patchwork
2022-04-27 0:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-27 1:05 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=516126dd-238e-89f8-1915-ae45d8284ddd@intel.com \
--to=daniele.ceraolospurio@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox