From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Always reset the timeslice after a context switch
Date: Mon, 13 Jan 2020 17:26:32 +0000 [thread overview]
Message-ID: <5384a339-3a73-3133-b57a-fbbe0bc7dec5@linux.intel.com> (raw)
In-Reply-To: <20200113104442.1753973-1-chris@chris-wilson.co.uk>
On 13/01/2020 10:44, Chris Wilson wrote:
> Currently, we reset the timer after a pre-eemption event. This has the
> side-effect that the timeslice runs into the second context after the
> first is completed. To be more fair, we want to reset the clock after
> promotion as well.
You mean after completion? If so then it makes sense to me.
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 9af1b2b493f4..a6ac37dece0a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -2285,7 +2285,6 @@ static void process_csb(struct intel_engine_cs *engine)
>
> /* Point active to the new ELSP; prevent overwriting */
> WRITE_ONCE(execlists->active, execlists->pending);
> - set_timeslice(engine);
>
> if (!inject_preempt_hang(execlists))
> ring_set_paused(engine, 0);
> @@ -2325,6 +2324,9 @@ static void process_csb(struct intel_engine_cs *engine)
> }
> } while (head != tail);
>
> + if (execlists_active(execlists))
> + set_timeslice(engine);
> +
> execlists->csb_head = head;
>
> /*
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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next prev parent reply other threads:[~2020-01-13 17:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-13 10:44 [Intel-gfx] [PATCH 1/4] drm/i915/gt: Always reset the timeslice after a context switch Chris Wilson
2020-01-13 10:44 ` [Intel-gfx] [PATCH 2/4] drm/i915: Use common priotree lists for virtual engine Chris Wilson
2020-01-14 11:13 ` Tvrtko Ursulin
2020-01-14 11:20 ` Chris Wilson
2020-01-14 13:48 ` Tvrtko Ursulin
2020-01-14 13:53 ` Chris Wilson
2020-01-14 11:38 ` Chris Wilson
2020-01-14 11:55 ` [Intel-gfx] [PATCH v2] " Chris Wilson
2020-01-13 10:44 ` [Intel-gfx] [PATCH 3/4] drm/i915/gt: Allow temporary suspension of inflight requests Chris Wilson
2020-01-14 18:33 ` Tvrtko Ursulin
2020-01-14 18:57 ` Chris Wilson
2020-01-13 10:44 ` [Intel-gfx] [PATCH 4/4] drm/i915/execlists: Offline error capture Chris Wilson
2020-01-13 11:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gt: Always reset the timeslice after a context switch Patchwork
2020-01-13 12:59 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-01-13 13:00 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-13 17:26 ` Tvrtko Ursulin [this message]
2020-01-14 12:51 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/4] drm/i915/gt: Always reset the timeslice after a context switch (rev2) Patchwork
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