From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
matthew.d.roper@intel.com, chris.p.wilson@linux.intel.com,
nirmoy.das@intel.com
Subject: Re: [Intel-gfx] [PATCH v8 4/7] drm/i915: No TLB invalidation on suspended GT
Date: Mon, 9 Oct 2023 10:00:30 +0100 [thread overview]
Message-ID: <53ab60cd-2517-356b-3c1f-db2f127f07fb@linux.intel.com> (raw)
In-Reply-To: <20231006182051.1599923-5-jonathan.cavitt@intel.com>
On 06/10/2023 19:20, Jonathan Cavitt wrote:
> In case of GT is suspended, don't allow submission of new TLB invalidation
> request and cancel all pending requests. The TLB entries will be
> invalidated either during GuC reload or on system resume.
>
> Signed-off-by: Fei Yang <fei.yang@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> CC: John Harrison <john.c.harrison@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
> drivers/gpu/drm/i915/gt/uc/intel_guc.h | 1 +
> .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 23 +++++++++++++++----
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 8 +++++++
> drivers/gpu/drm/i915/i915_driver.c | 2 ++
> 5 files changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 970bedf6b78a7..4e3bb221d2f4d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -179,4 +179,5 @@ enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> void intel_gt_bind_context_set_ready(struct intel_gt *gt);
> void intel_gt_bind_context_set_unready(struct intel_gt *gt);
> bool intel_gt_is_bind_context_ready(struct intel_gt *gt);
> +
Zap this.
> #endif /* __INTEL_GT_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> index 88deb43bbdc48..add74000e621e 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> @@ -536,4 +536,5 @@ void intel_guc_dump_time_info(struct intel_guc *guc, struct drm_printer *p);
>
> int intel_guc_sched_disable_gucid_threshold_max(struct intel_guc *guc);
>
> +void wake_up_all_tlb_invalidate(struct intel_guc *guc);
> #endif
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> index 0c5ccda1b3e87..4ed6e9e759007 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> @@ -1796,13 +1796,23 @@ static void __guc_reset_context(struct intel_context *ce, intel_engine_mask_t st
> intel_context_put(parent);
> }
>
> -void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
> +void wake_up_all_tlb_invalidate(struct intel_guc *guc)
> {
> struct intel_guc_tlb_wait *wait;
> + unsigned long i;
> +
> + if (!HAS_GUC_TLB_INVALIDATION(guc_to_gt(guc)->i915))
> + return;
> + xa_for_each(&guc->tlb_lookup, i, wait) {
> + wake_up(&wait->wq);
> + }
Drop the curlies?
> +}
> +
> +void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stalled)
> +{
> struct intel_context *ce;
> unsigned long index;
> unsigned long flags;
> - unsigned long i;
>
> if (unlikely(!guc_submission_initialized(guc))) {
> /* Reset called during driver load? GuC not yet initialised! */
> @@ -1838,8 +1848,7 @@ void intel_guc_submission_reset(struct intel_guc *guc, intel_engine_mask_t stall
> * invalidations on GT reset, and there's a large window of time
> * between the GT reset and GuC becoming available.
> */
> - xa_for_each(&guc->tlb_lookup, i, wait)
> - wake_up(&wait->wq);
> + wake_up_all_tlb_invalidate(guc);
> }
>
> static void guc_cancel_context_requests(struct intel_context *ce)
> @@ -1935,6 +1944,12 @@ void intel_guc_submission_cancel_requests(struct intel_guc *guc)
>
> /* GuC is blown away, drop all references to contexts */
> xa_destroy(&guc->context_lookup);
> +
> + /*
> + * Wedged GT won't respond to any TLB invalidation request. Simply
> + * release all the blocked waiters.
> + */
> + wake_up_all_tlb_invalidate(guc);
This goes to the following patch I think.
> }
>
> void intel_guc_submission_reset_finish(struct intel_guc *guc)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index 98b103375b7ab..8d6a4d8ce61bb 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -688,6 +688,9 @@ void intel_uc_suspend(struct intel_uc *uc)
> /* flush the GSC worker */
> intel_gsc_uc_flush_work(&uc->gsc);
>
> + if (HAS_GUC_TLB_INVALIDATION(guc_to_gt(guc)->i915))
> + wake_up_all_tlb_invalidate(guc);
> +
> if (!intel_guc_is_ready(guc)) {
> guc->interrupts.enabled = false;
> return;
> @@ -736,6 +739,11 @@ static int __uc_resume(struct intel_uc *uc, bool enable_communication)
>
> intel_gsc_uc_resume(&uc->gsc);
>
> + if (HAS_GUC_TLB_INVALIDATION(gt->i915)) {
> + intel_guc_invalidate_tlb_engines(guc);
> + intel_guc_invalidate_tlb_guc(guc);
> + }
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index ccbb2834cde07..85ac9400c2dc7 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -72,6 +72,7 @@
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_pm.h"
> #include "gt/intel_rc6.h"
> +#include "gt/intel_tlb.h"
>
> #include "pxp/intel_pxp.h"
> #include "pxp/intel_pxp_debugfs.h"
> @@ -1093,6 +1094,7 @@ static int i915_drm_suspend(struct drm_device *dev)
> intel_dp_mst_suspend(dev_priv);
>
> intel_runtime_pm_disable_interrupts(dev_priv);
> +
Zap this too please.
> intel_hpd_cancel_work(dev_priv);
>
> intel_suspend_encoders(dev_priv);
Patch got smaller and will be smaller still which is neat! If it is
still functionally correct it is a win-win.
Regards,
Tvrtko
next prev parent reply other threads:[~2023-10-09 9:00 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-06 18:20 [Intel-gfx] [PATCH v8 0/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 1/7] drm/i915: Add GuC TLB Invalidation device info flags Jonathan Cavitt
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 2/7] drm/i915/guc: Add CT size delay helper Jonathan Cavitt
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 3/7] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-09 8:56 ` Tvrtko Ursulin
2023-10-09 11:40 ` Andi Shyti
2023-10-09 12:49 ` Tvrtko Ursulin
2023-10-09 15:02 ` Cavitt, Jonathan
2023-10-09 19:14 ` John Harrison
2023-10-10 9:00 ` Tvrtko Ursulin
2023-10-09 12:12 ` Nirmoy Das
2023-10-09 12:54 ` Tvrtko Ursulin
2023-10-09 13:24 ` Nirmoy Das
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 4/7] drm/i915: No TLB invalidation on suspended GT Jonathan Cavitt
2023-10-09 9:00 ` Tvrtko Ursulin [this message]
2023-10-09 9:31 ` Jani Nikula
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 5/7] drm/i915: No TLB invalidation on wedged GT Jonathan Cavitt
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 6/7] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck Jonathan Cavitt
2023-10-06 18:20 ` [Intel-gfx] [PATCH v8 7/7] drm/i915: Enable GuC TLB invalidations for MTL Jonathan Cavitt
2023-10-06 21:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-10-06 21:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-06 21:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-07 6:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2) Patchwork
2023-10-07 6:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-07 6:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-07 16:47 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-09 11:52 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3) Patchwork
2023-10-09 11:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-09 12:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-09 14:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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