Re: [Intel-gfx] screen freeze with 5.2-rc6 Dell XPS-13 skylake i915

["Souza, Jose" <jose.souza@intel.com>]

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On Fri, 2019-07-12 at 01:03 +0200, Paul Bolle wrote:
> James Bottomley schreef op do 11-07-2019 om 15:38 [-0700]:
> > On Thu, 2019-07-11 at 22:26 +0000, Souza, Jose wrote:
> > > It eventually comes back from screen freeze? Like moving the
> > > mouse or
> > > typing brings it back?
> > 
> > No, it seems to be frozen for all time (at least until I got bored
> > waiting, which was probably 20 minutes).  Even if I reboot the
> > machine,
> > the current screen state stays until the system powers off.
> 
> As I mentioned earlier, a suspend/resume cycle unfreezes the screen.
> 
> And I seem to remember that, if the gnome screen-locking eventually
> kicks in,
> unlocking the screen still works, as the screen then isn't frozen
> anymore.
> 
> Thanks,

Thanks for all the information Paul.

Could test with the patch attached?

If the issue happens again could send the output of:

/sys/kernel/debug/dri/0/eDP-1/i915_psr_sink_status
/sys/kernel/debug/dri/0/i915_edp_psr_status

Thanks so much for all the help

> 
> 
> Paul Bolle
> 

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From ee495e2e879e718183d1b65af37393b535eeb966 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com>
Date: Thu, 11 Jul 2019 16:19:12 -0700
Subject: [PATCH] hack: drm/i915/psr: Always set PSR1 training times to max
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 963663ba0edf..83ca26e119b6 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -444,6 +444,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
 	if (INTEL_GEN(dev_priv) >= 11)
 		val |= EDP_PSR_TP4_TIME_0US;
 
+	/*
 	if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)
 		val |= EDP_PSR_TP1_TIME_0us;
 	else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100)
@@ -461,6 +462,9 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
 		val |= EDP_PSR_TP2_TP3_TIME_500us;
 	else
 		val |= EDP_PSR_TP2_TP3_TIME_2500us;
+	*/
+	val |= EDP_PSR_TP1_TIME_2500us;
+	val |= EDP_PSR_TP2_TP3_TIME_2500us;
 
 	if (intel_dp_source_supports_hbr2(intel_dp) &&
 	    drm_dp_tps3_supported(intel_dp->dpcd))
-- 
2.22.0