Re: [Intel-gfx] [PATCH 4/4] drm/i915/mtl: Skip pcode qgv restrictions for MTL

["Govindapillai, Vinod" <vinod.govindapillai@intel.com>]

On Fri, 2023-03-17 at 17:58 -0700, Radhakrishna Sripada wrote:
> Communicating QGV points restriction to PUnit happens via PM Demand
> instead of the Pcode mailbox in the previous platforms. GV point
> restriction is handled by the PM demand code.
> 
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---

Thanks! 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>


>  drivers/gpu/drm/i915/display/intel_bw.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 87c20bf52123..c292e63bdcbb 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -150,6 +150,9 @@ int icl_pcode_restrict_qgv_points(struct drm_i915_private *dev_priv,
>  {
>         int ret;
>  
> +       if (DISPLAY_VER(dev_priv) >= 14)
> +               return 0;
> +
>         /* bspec says to keep retrying for at least 1 ms */
>         ret = skl_pcode_request(&dev_priv->uncore, ICL_PCODE_SAGV_DE_MEM_SS_CONFIG,
>                                 points_mask,