Re: [Intel-gfx] [PATCH v2] drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0

["Souza, Jose" <jose.souza@intel.com>]

On Thu, 2021-04-22 at 19:05 +0300, Gwan-gyeong Mun wrote:
> TGL PSR2 hardware tracking shows momentary flicker and screen shift if
> TGL Display stepping is B1 from A0.
> It has been fixed from TGL Display stepping C0.
> 
> HSDES: 18015970021
> HSDES: 2209313811
> BSpec: 55378
> 
> v2: Add checking of PSR2 manual tracking (Jose)
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4ad756e238c5..17cbdd7805a2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -817,6 +817,13 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  		}
>  	}
>  
> 
> 
> 
> +	/* Wa_2209313811 */
> +	if (!crtc_state->enable_psr2_sel_fetch &&
> +	    IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) {
> +		drm_dbg_kms(&dev_priv->drm, "PSR2 HW tracking is not supported this Display stepping\n");
> +		return false;
> +	}
> +
>  	if (!crtc_state->enable_psr2_sel_fetch &&
>  	    (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {
>  		drm_dbg_kms(&dev_priv->drm,

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