public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Summers, Stuart" <stuart.summers@intel.com>
To: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 2/6] drm/i915: Add macro for SSEU stride calculation
Date: Wed, 1 May 2019 19:37:54 +0000	[thread overview]
Message-ID: <5ddb987f8a4148674959b3fc3814dc1956bbffcb.camel@intel.com> (raw)
In-Reply-To: <fdfbce56-944e-60d9-8978-bfedc0853481@intel.com>


[-- Attachment #1.1: Type: text/plain, Size: 3879 bytes --]

On Wed, 2019-05-01 at 11:11 -0700, Daniele Ceraolo Spurio wrote:
> 
> On 5/1/19 8:34 AM, Stuart Summers wrote:
> > Subslice stride and EU stride are calculated multiple times in
> > i915_query. Move this calculation to a macro to reduce code
> > duplication.
> > 
> > v2: update headers in intel_sseu.h
> > 
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> >   drivers/gpu/drm/i915/gt/intel_sseu.h |  2 ++
> >   drivers/gpu/drm/i915/i915_query.c    | 17 ++++++++---------
> >   2 files changed, 10 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h
> > b/drivers/gpu/drm/i915/gt/intel_sseu.h
> > index 73bc824094e8..c0b16b248d4c 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_sseu.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h
> > @@ -8,11 +8,13 @@
> >   #define __INTEL_SSEU_H__
> >   
> >   #include <linux/types.h>
> > +#include <linux/kernel.h>
> >   
> >   struct drm_i915_private;
> >   
> >   #define GEN_MAX_SLICES		(6) /* CNL upper bound */
> >   #define GEN_MAX_SUBSLICES	(8) /* ICL upper bound */
> > +#define GEN_SSEU_STRIDE(bits) DIV_ROUND_UP(bits, BITS_PER_BYTE)
> 
> What we pass to this macro isn't really a bits count but the maximum 
> amount of s/ss/eus. s/bits/max_entry/, or something like that? with
> that:

Makes sense, I'll make the change in the next series post. Thanks for
the review!

-Stuart

> 
> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Daniele
> 
> >   
> >   struct sseu_dev_info {
> >   	u8 slice_mask;
> > diff --git a/drivers/gpu/drm/i915/i915_query.c
> > b/drivers/gpu/drm/i915/i915_query.c
> > index 782183b78f49..7c1708c22811 100644
> > --- a/drivers/gpu/drm/i915/i915_query.c
> > +++ b/drivers/gpu/drm/i915/i915_query.c
> > @@ -37,6 +37,8 @@ static int query_topology_info(struct
> > drm_i915_private *dev_priv,
> >   	const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)-
> > >sseu;
> >   	struct drm_i915_query_topology_info topo;
> >   	u32 slice_length, subslice_length, eu_length, total_length;
> > +	u8 subslice_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
> > +	u8 eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
> >   	int ret;
> >   
> >   	if (query_item->flags != 0)
> > @@ -48,12 +50,10 @@ static int query_topology_info(struct
> > drm_i915_private *dev_priv,
> >   	BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask));
> >   
> >   	slice_length = sizeof(sseu->slice_mask);
> > -	subslice_length = sseu->max_slices *
> > -		DIV_ROUND_UP(sseu->max_subslices, BITS_PER_BYTE);
> > -	eu_length = sseu->max_slices * sseu->max_subslices *
> > -		DIV_ROUND_UP(sseu->max_eus_per_subslice,
> > BITS_PER_BYTE);
> > -
> > -	total_length = sizeof(topo) + slice_length + subslice_length +
> > eu_length;
> > +	subslice_length = sseu->max_slices * subslice_stride;
> > +	eu_length = sseu->max_slices * sseu->max_subslices * eu_stride;
> > +	total_length = sizeof(topo) + slice_length + subslice_length +
> > +		       eu_length;
> >   
> >   	ret = copy_query_item(&topo, sizeof(topo), total_length,
> >   			      query_item);
> > @@ -69,10 +69,9 @@ static int query_topology_info(struct
> > drm_i915_private *dev_priv,
> >   	topo.max_eus_per_subslice = sseu->max_eus_per_subslice;
> >   
> >   	topo.subslice_offset = slice_length;
> > -	topo.subslice_stride = DIV_ROUND_UP(sseu->max_subslices,
> > BITS_PER_BYTE);
> > +	topo.subslice_stride = subslice_stride;
> >   	topo.eu_offset = slice_length + subslice_length;
> > -	topo.eu_stride =
> > -		DIV_ROUND_UP(sseu->max_eus_per_subslice,
> > BITS_PER_BYTE);
> > +	topo.eu_stride = eu_stride;
> >   
> >   	if (__copy_to_user(u64_to_user_ptr(query_item->data_ptr),
> >   			   &topo, sizeof(topo)))
> > 

[-- Attachment #1.2: smime.p7s --]
[-- Type: application/x-pkcs7-signature, Size: 3270 bytes --]

[-- Attachment #2: Type: text/plain, Size: 159 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-05-01 19:37 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-01 15:34 [PATCH 0/6] Refactor to expand subslice mask Stuart Summers
2019-05-01 15:34 ` [PATCH 1/6] drm/i915: Use local variable for SSEU info in GETPARAM ioctl Stuart Summers
2019-05-01 17:54   ` Daniele Ceraolo Spurio
2019-05-01 19:38     ` Summers, Stuart
2019-05-01 15:34 ` [PATCH 2/6] drm/i915: Add macro for SSEU stride calculation Stuart Summers
2019-05-01 18:11   ` Daniele Ceraolo Spurio
2019-05-01 19:37     ` Summers, Stuart [this message]
2019-05-01 15:34 ` [PATCH 3/6] drm/i915: Move calculation of subslices per slice to new function Stuart Summers
2019-05-01 18:14   ` Daniele Ceraolo Spurio
2019-05-01 19:37     ` Summers, Stuart
2019-05-01 15:34 ` [PATCH 4/6] drm/i915: Move sseu helper functions to intel_sseu.h Stuart Summers
2019-05-01 18:48   ` Daniele Ceraolo Spurio
2019-05-01 19:36     ` Summers, Stuart
2019-05-01 15:34 ` [PATCH 5/6] drm/i915: Remove inline from sseu helper functions Stuart Summers
2019-05-01 20:04   ` Daniele Ceraolo Spurio
2019-05-01 21:04     ` Summers, Stuart
2019-05-01 21:19       ` Daniele Ceraolo Spurio
2019-05-01 21:28         ` Summers, Stuart
2019-05-02  7:15           ` Jani Nikula
2019-05-02 14:50             ` Summers, Stuart
2019-05-02 14:58               ` Jani Nikula
2019-05-02 14:58                 ` Summers, Stuart
2019-05-01 15:34 ` [PATCH 6/6] drm/i915: Expand subslice mask Stuart Summers
2019-05-01 18:22   ` Tvrtko Ursulin
2019-05-01 18:29     ` Tvrtko Ursulin
2019-05-01 19:40       ` Summers, Stuart
2019-05-01 22:04   ` Daniele Ceraolo Spurio
2019-05-02 14:47     ` Summers, Stuart
2019-05-03  9:05       ` Lionel Landwerlin
2019-05-03 14:28         ` Summers, Stuart
2019-05-01 15:58 ` ✗ Fi.CI.CHECKPATCH: warning for Refactor to expand subslice mask (rev7) Patchwork
2019-05-01 16:01 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-05-01 16:14 ` ✓ Fi.CI.BAT: success " Patchwork
2019-05-02  9:14 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-04-30 23:06 [PATCH 0/6] Refactor to expand subslice mask Stuart Summers
2019-04-30 23:06 ` [PATCH 2/6] drm/i915: Add macro for SSEU stride calculation Stuart Summers

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5ddb987f8a4148674959b3fc3814dc1956bbffcb.camel@intel.com \
    --to=stuart.summers@intel.com \
    --cc=daniele.ceraolospurio@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox