From: "Srivatsa, Anusha" <anusha.srivatsa@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Sort EHL/JSL PCI IDs
Date: Fri, 30 Oct 2020 19:34:01 +0000 [thread overview]
Message-ID: <6046b238187a44e0b7c569efc7d0e9b8@intel.com> (raw)
In-Reply-To: <20201030164124.16922-1-ville.syrjala@linux.intel.com>
> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Friday, October 30, 2020 9:41 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Subject: [PATCH v2] drm/i915: Sort EHL/JSL PCI IDs
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Sort the EHL/JSL PCI IDs numerically. Some order seems better than
> randomness.
>
> v2: Deal with the JSL vs. EHL split
>
> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> #v1
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> include/drm/i915_pciids.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 3b5ed1e4f3ec..4a0a06f4a81e 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -585,19 +585,19 @@
> /* EHL */
> #define INTEL_EHL_IDS(info) \
> INTEL_VGA_DEVICE(0x4500, info), \
0x4500 is actually no longer a valid PCI ID for the platform.
Anusha
> - INTEL_VGA_DEVICE(0x4571, info), \
> - INTEL_VGA_DEVICE(0x4551, info), \
> INTEL_VGA_DEVICE(0x4541, info), \
> + INTEL_VGA_DEVICE(0x4551, info), \
> + INTEL_VGA_DEVICE(0x4555, info), \
> INTEL_VGA_DEVICE(0x4557, info), \
> - INTEL_VGA_DEVICE(0x4555, info)
> + INTEL_VGA_DEVICE(0x4571, info)
>
> /* JSL */
> #define INTEL_JSL_IDS(info) \
> - INTEL_VGA_DEVICE(0x4E71, info), \
> - INTEL_VGA_DEVICE(0x4E61, info), \
> - INTEL_VGA_DEVICE(0x4E57, info), \
> + INTEL_VGA_DEVICE(0x4E51, info), \
> INTEL_VGA_DEVICE(0x4E55, info), \
> - INTEL_VGA_DEVICE(0x4E51, info)
> + INTEL_VGA_DEVICE(0x4E57, info), \
> + INTEL_VGA_DEVICE(0x4E61, info), \
> + INTEL_VGA_DEVICE(0x4E71, info)
>
> /* TGL */
> #define INTEL_TGL_12_GT1_IDS(info) \
> --
> 2.26.2
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next prev parent reply other threads:[~2020-10-30 19:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-30 16:41 [Intel-gfx] [PATCH v2] drm/i915: Sort EHL/JSL PCI IDs Ville Syrjala
2020-10-30 17:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-10-30 19:34 ` Srivatsa, Anusha [this message]
2020-10-30 19:55 ` [Intel-gfx] [PATCH v2] " Ville Syrjälä
2020-10-30 21:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
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