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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Souza, Jose" <jose.souza@intel.com>
Cc: "markpearson@lenovo.com" <markpearson@lenovo.com>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915/psr: Use full update In case of area calculation fails
Date: Fri, 6 May 2022 18:28:17 +0000	[thread overview]
Message-ID: <60ff6aea75030f144e7676eb85d775a3612ad1c9.camel@intel.com> (raw)
In-Reply-To: <274b1d451fa18abd11e918acb44fecb108b9ba55.camel@intel.com>

On Fri, 2022-05-06 at 15:29 +0000, Souza, Jose wrote:
> On Fri, 2022-05-06 at 08:48 +0300, Jouni Högander wrote:
> > Currently we have some corner cases where area calculation
> > fails.  For
> > these sel fetch are calculation ends up having update area as y1 =
> > 0,
> > y2 = 4. Instead of these values safer option is full update.
> 
> Aren't you able to reproduce this scenarios with IGT? So why not
> probably fix the calculations?

There were some discussion with Ville Syrjälä that the proper fix for
this would be to move psr update area calculation into where other
calculations for planes are done. Currently we don't have e.g. proper
offset information available here. I have this in my tasklist, but been
busy with other tracks.

I'm also concerned generally on the first loop possibly ending up with
y1=-1,y2=-1 values due to other reasons as well. So using that
full_update prevents this posibility completely.

If I forget how I originally found this problem with bigfb I think this
backup using full update if something goes wrong is generally a good
idea. Currently it's just using y1=0,y2=4.

> 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Tested-by: Mark Pearson <markpearson@lenovo.com>
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 06db407e2749..8c099d24de86 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1770,6 +1770,9 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> >  clip_area_update(&pipe_clip, &damaged_area);
> >  }
> > 
> > +if (pipe_clip.y1 == -1)
> > +full_update = true;
> > +
> >  if (full_update)
> >  goto skip_sel_fetch_set_loop;
> > 


  reply	other threads:[~2022-05-06 18:28 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-06  5:48 [Intel-gfx] [PATCH 0/2] Fixes for selective fetch area calculation Jouni Högander
2022-05-06  5:48 ` [Intel-gfx] [PATCH 1/2] drm/i915/psr: Use full update In case of area calculation fails Jouni Högander
2022-05-06 15:29   ` Souza, Jose
2022-05-06 18:28     ` Hogander, Jouni [this message]
2022-05-06 18:40       ` Souza, Jose
2022-05-09  7:30         ` Hogander, Jouni
2022-05-06  5:48 ` [Intel-gfx] [PATCH 2/2] drm/i915: Ensure damage clip area is within pipe area Jouni Högander
2022-05-06 15:43   ` Souza, Jose
2022-05-09  7:25     ` Hogander, Jouni
2022-05-06 10:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for selective fetch area calculation Patchwork
2022-05-06 13:37 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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