From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Justen, Jordan L" <jordan.l.justen@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Souza, Jose" <jose.souza@intel.com>
Cc: "dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [Intel-gfx] [PATCH v9 6/8] drm/i915/uapi/pxp: Add a GET_PARAM for PXP
Date: Wed, 10 May 2023 22:00:03 +0000 [thread overview]
Message-ID: <642c1a52bbcc4369c69ec2dbbfd7723c60c1dcb2.camel@intel.com> (raw)
In-Reply-To: <168375545081.1096084.10046830335154502443@jljusten-skl>
alan:snip
> This is why I asked if it was it was "basically certain that in a
> production environment, then it will eventually return 1 meaning it's
> ready". Alan's response was a little ambiguous on this point.
alan: if we get a '2' and never transition to '1' - thats a kernel bug or
firmware / system issue.
> Arguably a transition from 2 to -ENODEV could be considered a kernel
> bug, but it doesn't sound like Alan would agree. :) Maybe Alan would
> agree to saying it's either a kernel, or system integration bug.
alan: agreed - that would be a kernel bug or a system integration bug.
I also agreed on the init-flow vs app-usage thoughts Jordan had.
That said MESA has many ways it can use this UAPI and we can discuss
that on the MESA patch.
hmmm.. so... ack anyone? [insert big hopeful smiley here]
apologies if I am asking too often.
next prev parent reply other threads:[~2023-05-10 22:00 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-27 23:48 [Intel-gfx] [PATCH v9 0/8] drm/i915/pxp: Add MTL PXP Support Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 1/8] drm/i915/pxp: Add GSC-CS back-end resource init and cleanup Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 2/8] drm/i915/pxp: Add MTL hw-plumbing enabling for KCR operation Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 3/8] drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC Alan Previn
2023-04-28 0:22 ` Teres Alexis, Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 4/8] drm/i915/pxp: Add GSC-CS backend to send GSC fw messages Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 5/8] drm/i915/pxp: Add ARB session creation and cleanup Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 6/8] drm/i915/uapi/pxp: Add a GET_PARAM for PXP Alan Previn
2023-05-05 5:30 ` Teres Alexis, Alan Previn
2023-05-05 7:39 ` Jordan Justen
2023-05-08 17:49 ` Teres Alexis, Alan Previn
2023-05-09 13:27 ` Teres Alexis, Alan Previn
2023-05-10 4:01 ` Teres Alexis, Alan Previn
2023-05-10 19:40 ` Souza, Jose
2023-05-10 20:24 ` Teres Alexis, Alan Previn
2023-05-10 21:38 ` Jordan Justen
2023-05-10 21:50 ` Jordan Justen
2023-05-10 22:00 ` Teres Alexis, Alan Previn [this message]
2023-05-10 22:24 ` Jordan Justen
2023-05-10 23:24 ` Teres Alexis, Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 7/8] drm/i915/pxp: On MTL, KCR enabling doesn't wait on tee component Alan Previn
2023-04-27 23:48 ` [Intel-gfx] [PATCH v9 8/8] drm/i915/pxp: Enable PXP with MTL-GSC-CS Alan Previn
2023-04-28 0:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pxp: Add MTL PXP Support (rev9) Patchwork
2023-04-28 0:18 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-28 0:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-28 5:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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