From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/adl_p: Same slices mask is not same Dbuf state
Date: Mon, 31 May 2021 14:54:33 +0000 [thread overview]
Message-ID: <6e5e684de71644179b858003e0a2e8a6@intel.com> (raw)
In-Reply-To: <20210527110106.21434-1-stanislav.lisovskiy@intel.com>
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Stanislav
> Lisovskiy
> Sent: Thursday, May 27, 2021 4:31 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915/adl_p: Same slices mask is not same Dbuf
> state
>
> We currently treat same slice mask as a same DBuf state and skip updating the Dbuf
> slices, if we detect that.
> This is wrong as if we have a multi to single pipe change or vice versa, that would be
> treated as a same Dbuf state and thus no changes required, so we don't get Mbus
> updated, causing issues.
> Solution: check also mbus_join, in addition to slices mask.
Change looks good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 00f3dead20ad..804d83486e81 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8093,7 +8093,8 @@ void intel_dbuf_pre_plane_update(struct
> intel_atomic_state *state)
> intel_atomic_get_old_dbuf_state(state);
>
> if (!new_dbuf_state ||
> - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
> + ((new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
> + && (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus)))
> return;
>
> WARN_ON(!new_dbuf_state->base.changed);
> @@ -8113,7 +8114,8 @@ void intel_dbuf_post_plane_update(struct
> intel_atomic_state *state)
> intel_atomic_get_old_dbuf_state(state);
>
> if (!new_dbuf_state ||
> - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
> + ((new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices)
> + && (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus)))
> return;
>
> WARN_ON(!new_dbuf_state->base.changed);
> --
> 2.24.1.485.gad05a3d8e5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2021-05-31 14:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 11:01 [Intel-gfx] [PATCH] drm/i915/adl_p: Same slices mask is not same Dbuf state Stanislav Lisovskiy
2021-05-27 13:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-05-27 13:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-28 9:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-31 14:54 ` Shankar, Uma [this message]
2021-06-09 14:26 ` [Intel-gfx] [PATCH] " Jani Nikula
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