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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: Do not allow setting ring size for legacy ring submission
Date: Mon, 21 Jun 2021 13:52:52 +0100	[thread overview]
Message-ID: <74c6afe5-a76f-1895-d37b-d738978e2804@linux.intel.com> (raw)
In-Reply-To: <04424cbf-750a-4cb9-a99a-6a5a3671452f@linux.intel.com>


On 21/06/2021 13:08, Tvrtko Ursulin wrote:
> 
> I had some questions on the trybot mailing list, let me copy&paste..
> 
> On 21/06/2021 12:41, Maarten Lankhorst wrote:
>> It doesn't work for legacy ring submission, and is in the best case
>> ignored.
> 
> Looks rejected instead of ignored:
> 
> static int set_ringsize(struct i915_gem_context *ctx,
>              struct drm_i915_gem_context_param *args)
> {
>      if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915))
>          return -ENODEV;
>>
>> In the worst case we end up freeing engine->legacy.ring for all other
>> active engines, resulting in a use-after-free.
> 
> Worst case is cloning because ring_context_alloc is not taking a 
> reference to engine->legacy.ring, or something else?

No can't be that, it was my incomplete analysis last week. Since 
ring_context_destroy does not actually free the legacy ring I don't see 
any use after free paths.

Regards,

Tvrtko

>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Fixes: 88be76cdafc7 ("drm/i915: Allow userspace to specify ringsize on 
>> construction")
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_context_param.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_context_param.c 
>> b/drivers/gpu/drm/i915/gt/intel_context_param.c
>> index 65dcd090245d..412c36d1b1dd 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_context_param.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_context_param.c
>> @@ -12,6 +12,9 @@ int intel_context_set_ring_size(struct intel_context 
>> *ce, long sz)
>>   {
>>       int err;
>> +    if (ce->engine->gt->submission_method == INTEL_SUBMISSION_RING)
>> +        return 0;
>> +
>>       if (intel_context_lock_pinned(ce))
>>           return -EINTR;
>>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2021-06-21 12:53 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-21 11:41 [Intel-gfx] [PATCH 1/3] drm/i915/gt: Do not allow setting ring size for legacy ring submission Maarten Lankhorst
2021-06-21 11:41 ` [Intel-gfx] [PATCH 2/3] drm/i915: Use intel_context->pin_mutex only for context allocation Maarten Lankhorst
2021-06-21 11:41 ` [Intel-gfx] [PATCH 3/3] drm/i915: Remove intel_context->ops->(pre_pin/post_unpin) Maarten Lankhorst
2021-06-21 12:08 ` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Do not allow setting ring size for legacy ring submission Tvrtko Ursulin
2021-06-21 12:49   ` Maarten Lankhorst
2021-06-21 12:52   ` Tvrtko Ursulin [this message]
2021-06-21 13:07     ` Maarten Lankhorst
2021-06-21 13:12       ` Tvrtko Ursulin
2021-06-21 13:20         ` Tvrtko Ursulin
2021-06-21 13:28           ` Maarten Lankhorst
2021-06-21 12:14 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] " Patchwork
2021-06-21 12:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-21 15:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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