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From: Oscar Mateo <oscar.mateo@intel.com>
To: Sagar Arun Kamble <sagar.a.kamble@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v9] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances
Date: Wed, 28 Feb 2018 09:59:54 -0800	[thread overview]
Message-ID: <760c236f-45bf-2cb7-9b78-476a1c2b0b03@intel.com> (raw)
In-Reply-To: <dc18b8b0-fb49-ee49-4b28-1d92faec59be@intel.com>



On 2/26/2018 9:49 PM, Sagar Arun Kamble wrote:
>
>
> On 2/27/2018 4:34 AM, Oscar Mateo wrote:
>>
>>
>> On 2/25/2018 9:22 PM, Sagar Arun Kamble wrote:
>>>
>>>
>>> On 2/23/2018 4:35 AM, Oscar Mateo wrote:
>>>>
>>>>
>>> <snip>
>>>>>> + * We might have detected that some engines are fused off after 
>>>>>> we initialized
>>>>>> + * the forcewake domains. Prune them, to make sure they only 
>>>>>> reference existing
>>>>>> + * engines.
>>>>>> + */
>>>>>> +void intel_uncore_prune(struct drm_i915_private *dev_priv)
>>>>>> +{
>>>>>> +    if (INTEL_GEN(dev_priv) >= 11) {
>>>>>> +        enum forcewake_domains fw_domains = 
>>>>>> dev_priv->uncore.fw_domains;
>>>>>> +        enum forcewake_domain_id domain_id;
>>>>>> +        int i;
>>>>>> +
>>>>>> +        for (i = 0; i < I915_MAX_VCS; i++) {
>>>>>> +            domain_id = FW_DOMAIN_ID_MEDIA_VDBOX0 + i;
>>>>>> +
>>>>>> +            if (HAS_ENGINE(dev_priv, _VCS(i)))
>>>>>> +                continue;
>>>>>> +
>>>>>> +            if (fw_domains & BIT(domain_id))
>>>>> fw_domains check seems redundant as it is initialized based on 
>>>>> HAS_ENGINE.
>>>>> we can just have
>>>>> if (!HAS_ENGINE(dev_priv, _VCS(i)))
>>>>>     fw_domain_fini(dev_priv, domain_id);
>>>>
>>>> I don't want to call fw_domain_fini on something we never 
>>>> initialized in the first place (e.g. VCS1/3 and VECS1/2/3 on an 
>>>> ICL-LP).
>>>>
>>> Right. Makes sense.
>>> for loop iterating over engines based on ring_mask can help us rely 
>>> on only HAS_ENGINE condition and then we can have complete pruning 
>>> in single for loop.
>>> what do you think?
>>
>> Hmmm.. I'm not sure I follow: intel_device_info_init_mmio modifies 
>> ring_mask, so if I loop over engines based on ring_mask I am going to 
>> miss those I want to prune, right?
>>
> Oops ... you are right ...
> My suggestion about skipping fw_domains check will not work currently. 
> In future may be if we create default ring_mask and runtime ring_mask 
> it can be reworked.
>
> Other suggestion to use single for loop (for_each_engine()) can be 
> done I think.
> It will make it generic for all engine types.  Below is what I am 
> thinking of as part of intel_uncore_prune:
>
> for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {
>     if (HAS_ENGINE(dev_priv, i))
>         continue;
>     if (fw_domains & BIT(i))
>         fw_domain_fini(dev_priv, i);
> }

This won't work either, because the index for engines and forcewake 
domains is different. If you think it is important to make the prune 
function more generic, I can translate between the two (but it will be 
for naught if, as you mentioned, we are working to create separate 
default ring_mask and runtime ring_mask in the future).

>>>>>> + fw_domain_fini(dev_priv, domain_id);
>>>>>> +        }
>>>>>> +
>>>>>> +        for (i = 0; i < I915_MAX_VECS; i++) {
>>>>>> +            domain_id = FW_DOMAIN_ID_MEDIA_VEBOX0 + i;
>>>>>> +
>>>>>> +            if (HAS_ENGINE(dev_priv, _VECS(i)))
>>>>>> +                continue;
>>>>>> +
>>>>>> +            if (fw_domains & BIT(domain_id))
>>>>>> +                fw_domain_fini(dev_priv, domain_id);
>>>>>> +        }
>>>>>> +    }
>>>>>> +}
>>>>>> +
>>>>>>   void intel_uncore_fini(struct drm_i915_private *dev_priv)
>>>>>>   {
>>>>>>       /* Paranoia: make sure we have disabled everything before 
>>>>>> we exit. */
>>>>>> diff --git a/drivers/gpu/drm/i915/intel_uncore.h 
>>>>>> b/drivers/gpu/drm/i915/intel_uncore.h
>>>>>> index 53ef77d..28feabf 100644
>>>>>> --- a/drivers/gpu/drm/i915/intel_uncore.h
>>>>>> +++ b/drivers/gpu/drm/i915/intel_uncore.h
>>>>>> @@ -129,6 +129,7 @@ struct intel_uncore {
>>>>>>     void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
>>>>>>   void intel_uncore_init(struct drm_i915_private *dev_priv);
>>>>>> +void intel_uncore_prune(struct drm_i915_private *dev_priv);
>>>>>>   bool intel_uncore_unclaimed_mmio(struct drm_i915_private 
>>>>>> *dev_priv);
>>>>>>   bool intel_uncore_arm_unclaimed_mmio_detection(struct 
>>>>>> drm_i915_private *dev_priv);
>>>>>>   void intel_uncore_fini(struct drm_i915_private *dev_priv);
>>>>>
>>>>
>>>
>>
>

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  reply	other threads:[~2018-02-28 17:59 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-13 16:37 [PATCH 00/20] ICL GEM enabling (v2) Mika Kuoppala
2018-02-13 16:37 ` [PATCH 01/20] drm/i915/icl: Add the ICL PCI IDs Mika Kuoppala
2018-02-13 17:38   ` Michel Thierry
2018-02-13 18:48   ` Anuj Phogat
2018-02-13 16:37 ` [PATCH 02/20] drm/i915/icl: add icelake_init_clock_gating() Mika Kuoppala
2018-02-13 16:37 ` [PATCH 03/20] drm/i915/icl: Show interrupt registers in debugfs Mika Kuoppala
2018-02-13 19:44   ` Daniele Ceraolo Spurio
2018-02-14  9:55     ` Mika Kuoppala
2018-02-14 11:08   ` Mika Kuoppala
2018-02-13 16:37 ` [PATCH 04/20] drm/i915/icl: Prepare for more rings Mika Kuoppala
2018-02-13 16:37 ` [PATCH 05/20] drm/i915/icl: Interrupt handling Mika Kuoppala
2018-02-13 17:06   ` Chris Wilson
2018-02-13 19:18   ` Daniele Ceraolo Spurio
2018-02-13 21:56     ` Oscar Mateo
2018-02-13 22:02       ` Chris Wilson
2018-02-14 13:37   ` Mika Kuoppala
2018-02-14 14:12   ` [PATCH 05/19] " Mika Kuoppala
2018-02-14 14:25     ` Chris Wilson
2018-02-15 16:24       ` Mika Kuoppala
2018-02-15 16:27     ` Mika Kuoppala
2018-02-15 16:35       ` Tvrtko Ursulin
2018-02-15 17:59       ` Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 06/20] drm/i915/icl: Ringbuffer interrupt handling Mika Kuoppala
2018-02-13 18:44   ` Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 07/20] drm/i915/icl: Correctly initialize the Gen11 engines Mika Kuoppala
2018-02-13 16:37 ` [PATCH 08/20] drm/i915/icl: new context descriptor support Mika Kuoppala
2018-02-14 23:34   ` [PATCH v5] " Daniele Ceraolo Spurio
2018-02-13 16:37 ` [PATCH 09/20] drm/i915/icl: Enhanced execution list support Mika Kuoppala
2018-02-13 16:37 ` [PATCH 10/20] drm/i915/icl: Add Indirect Context Offset for Gen11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 11/20] drm/i915/icl: Gen11 forcewake support Mika Kuoppala
2018-02-13 16:37 ` [PATCH 12/20] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances Mika Kuoppala
2018-02-13 17:13   ` Michal Wajdeczko
2018-02-17  8:51   ` Sagar Arun Kamble
2018-02-17  9:04     ` Chris Wilson
2018-02-17 12:10       ` Sagar Arun Kamble
2018-02-17 12:18         ` Chris Wilson
2018-02-17 14:17           ` Sagar Arun Kamble
2018-02-20 19:16             ` Daniele Ceraolo Spurio
2018-02-21 23:35             ` [PATCH v9] " Oscar Mateo
2018-02-22  6:17               ` Sagar Arun Kamble
2018-02-22 23:05                 ` Oscar Mateo
2018-02-26  5:22                   ` Sagar Arun Kamble
2018-02-26 23:04                     ` Oscar Mateo
2018-02-27  5:49                       ` Sagar Arun Kamble
2018-02-28 17:59                         ` Oscar Mateo [this message]
2018-03-01  5:07                           ` Sagar Arun Kamble
2018-02-23  2:21               ` kbuild test robot
2018-02-23  3:03               ` kbuild test robot
2018-02-13 16:37 ` [PATCH 13/20] drm/i915/icl: Enable the extra video decode and enhancement boxes for Icelake 11 Mika Kuoppala
2018-02-13 18:05   ` Michel Thierry
2018-02-13 16:37 ` [PATCH 14/20] drm/i915/icl: Update subslice define for ICL 11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 15/20] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection Mika Kuoppala
2018-02-13 18:27   ` Lionel Landwerlin
2018-02-13 16:37 ` [PATCH 16/20] drm/i915/icl: Add reset control register changes Mika Kuoppala
2018-02-13 16:37 ` [PATCH 17/20] drm/i915/icl: Add configuring MOCS in new Icelake engines Mika Kuoppala
2018-02-13 18:13   ` Michel Thierry
2018-02-13 16:37 ` [PATCH 18/20] drm/i915/icl: Split out the servicing of the Selector and Shared IIR registers Mika Kuoppala
2018-02-13 16:37 ` [PATCH 19/20] drm/i915/icl: Handle RPS interrupts correctly for Gen11 Mika Kuoppala
2018-02-13 16:37 ` [PATCH 20/20] drm/i915/icl: Enable RC6 and RPS in Gen11 Mika Kuoppala
2018-02-13 17:34 ` ✓ Fi.CI.BAT: success for ICL GEM enabling (v2) Patchwork
2018-02-13 21:36 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-02-14 13:30 ` ✗ Fi.CI.CHECKPATCH: warning for ICL GEM enabling (v2) (rev2) Patchwork
2018-02-14 13:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-02-14 23:41 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev4) Patchwork
2018-02-15 17:01 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev5) Patchwork
2018-02-21 23:59 ` ✗ Fi.CI.BAT: failure for ICL GEM enabling (v2) (rev6) Patchwork

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