From: Matthew Auld <matthew.auld@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>,
intel-gfx@lists.freedesktop.org,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce DG1
Date: Wed, 30 Sep 2020 10:14:23 +0100 [thread overview]
Message-ID: <772d82ab-960e-e292-c13b-9e608477b435@intel.com> (raw)
In-Reply-To: <20200930080122.ckadmyuvy7havxuo@ldmartin-desk1>
On 30/09/2020 09:01, Lucas De Marchi wrote:
> +Matthew Auld
>
> On Wed, Sep 30, 2020 at 07:44:25AM +0000, Patchwork wrote:
>> == Series Details ==
>>
>> Series: Introduce DG1
>> URL : https://patchwork.freedesktop.org/series/82241/
>> State : failure
>>
>> == Summary ==
>>
>> CI Bug Log - changes from CI_DRM_9077 -> Patchwork_18595
>> ====================================================
>>
>> Summary
>> -------
>>
>> **FAILURE**
>>
>> Serious unknown changes coming with Patchwork_18595 absolutely need
>> to be
>> verified manually.
>>
>> If you think the reported changes have nothing to do with the changes
>> introduced in Patchwork_18595, please notify your bug team to allow them
>> to document this new failure mode, which will reduce false positives
>> in CI.
>>
>> External URL:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/index.html
>>
>> Possible new issues
>> -------------------
>>
>> Here are the unknown changes that may have been introduced in
>> Patchwork_18595:
>>
>> ### IGT changes ###
>>
>> #### Possible regressions ####
>>
>> * igt@i915_selftest@live@gt_engines:
>> - fi-skl-lmem: [PASS][1] -> [DMESG-WARN][2] +31 similar issues
>> [1]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-skl-lmem/igt@i915_selftest@live@gt_engines.html
>>
>> [2]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-skl-lmem/igt@i915_selftest@live@gt_engines.html
>>
>
> Matt, this is failing on fi-skl-lmem, basically because we are adding
> checks for IS_DGFX() expecting only really dgfx devices would be true.
> However fake lmem code overwrites device info setting it to 1.
>
> We will need more decisions in the driver checking for dgfx besides
> lmem. Should we a) go ahead and remove fake lmem or b) add the
> checks explictly for fake lmem, like IS_DGFX() || HAS_FAKE_LMEM()
> or c) something else?
Ideally we would keep fake-lmem, at least until we have real LMEM with
dg1 being tested in CI, otherwise it's more likely we break something
and it goes by unnoticed in upstream. For example, patches like[1] are
at least smoke tested through the selftests with the LMEM path enabled,
which is pretty useful.
I would prefer option b) for now, but if it's too painful I guess we
just delete it.
[1] https://patchwork.freedesktop.org/patch/392327/?series=82063&rev=2
>
> thanks
> Lucas De Marchi
>
>>
>>
>> Known issues
>> ------------
>>
>> Here are the changes found in Patchwork_18595 that come from known
>> issues:
>>
>> ### IGT changes ###
>>
>> #### Issues hit ####
>>
>> * igt@kms_chamelium@common-hpd-after-suspend:
>> - fi-kbl-7500u: [PASS][3] -> [DMESG-WARN][4] ([i915#2203])
>> [3]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-kbl-7500u/igt@kms_chamelium@common-hpd-after-suspend.html
>>
>> [4]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-kbl-7500u/igt@kms_chamelium@common-hpd-after-suspend.html
>>
>>
>>
>> #### Possible fixes ####
>>
>> * igt@i915_module_load@reload:
>> - fi-byt-j1900: [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
>> [5]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-byt-j1900/igt@i915_module_load@reload.html
>>
>> [6]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-byt-j1900/igt@i915_module_load@reload.html
>>
>>
>> * igt@i915_pm_rpm@basic-pci-d3-state:
>> - fi-bsw-kefka: [DMESG-WARN][7] ([i915#1982]) -> [PASS][8]
>> [7]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
>>
>> [8]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
>>
>>
>>
>> #### Warnings ####
>>
>> * igt@kms_force_connector_basic@prune-stale-modes:
>> - fi-kbl-x1275: [DMESG-WARN][9] ([i915#62] / [i915#92] /
>> [i915#95]) -> [DMESG-WARN][10] ([i915#62] / [i915#92]) +8 similar issues
>> [9]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html
>>
>> [10]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-kbl-x1275/igt@kms_force_connector_basic@prune-stale-modes.html
>>
>>
>> * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
>> - fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92]) ->
>> [DMESG-WARN][12] ([i915#62] / [i915#92] / [i915#95]) +4 similar issues
>> [11]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9077/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
>>
>> [12]:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/fi-kbl-x1275/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
>>
>>
>>
>> [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
>> [i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
>> [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
>> [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
>> [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
>>
>>
>> Participating hosts (45 -> 38)
>> ------------------------------
>>
>> Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
>> fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
>>
>>
>> Build changes
>> -------------
>>
>> * Linux: CI_DRM_9077 -> Patchwork_18595
>>
>> CI-20190529: 20190529
>> CI_DRM_9077: ae1f3f7de609df105aeceed2655656ffc838d720 @
>> git://anongit.freedesktop.org/gfx-ci/linux
>> IGT_5793: c34792447c9fc4d05dd75873cdb99d9ffe57ea23 @
>> git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>> Patchwork_18595: b609cfe8808be834400aab6819a1b43b7bc5a5d8 @
>> git://anongit.freedesktop.org/gfx-ci/linux
>>
>>
>> == Linux commits ==
>>
>> b609cfe8808b drm/i915/dgfx: define llc and snooping behaviour
>> 648249c6dd8b drm/i915/dg1: Change DMC_DEBUG{1, 2} registers
>> 9034c09bbbdf drm/i915/dg1: DG1 does not support DC6
>> 01007b9c648c drm/i915/dg1: Add initial DG1 workarounds
>> f5c37ea500ef drm/i915/dg1: Load DMC
>> 571405def6c9 drm/i915/dg1: enable PORT C/D aka D/E
>> 3056c7ce001a drm/i915/dg1: map/unmap pll clocks
>> d0727f32e9ec drm/i915/dg1: provide port/phy mapping for vbt
>> dc3f763d7b05 drm/i915/dg1: Update voltage swing tables for DP
>> e764c35d3b9e drm/i915/dg1: Update comp master/slave relationships for
>> PHYs
>> a96cb47a46d4 drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
>> b5634537768e drm/i915/dg1: Enable first 2 ports for DG1
>> ed7812a70681 drm/i915/dg1: gmbus pin mapping
>> 1556d9b840f8 drm/i915/dg1: invert HPD pins
>> 4caa7e8d99ff drm/i915/dg1: add hpd interrupt handling
>> fc9e91e510d5 drm/i915/dg1: Enable DPLL for DG1
>> 802098453f92 drm/i915/dg1: Add and setup DPLLs for DG1
>> 46ba3b109500 drm/i915/dg1: Add DPLL macros for DG1
>> 313e894b5c43 drm/i915/dg1: Wait for pcode/uncore handshake at startup
>> af7964472d1d drm/i915/dg1: Increase mmio size to 4MB
>> 44b1fb34d9e6 drm/i915/dg1: Add DG1 power wells
>> 90eb98d91e8e drm/i915/dg1: Define MOCS table for DG1
>> 02a93e492718 drm/i915/dg1: Initialize RAWCLK properly
>> 2ab727864817 drm/i915/dg1: add more PCI ids
>>
>> == Logs ==
>>
>> For more details see:
>> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18595/index.html
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prev parent reply other threads:[~2020-09-30 9:14 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-30 6:42 [Intel-gfx] [PATCH v6 00/24] Introduce DG1 Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 01/24] drm/i915/dg1: add more PCI ids Lucas De Marchi
2020-09-30 14:00 ` Matt Roper
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 02/24] drm/i915/dg1: Initialize RAWCLK properly Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 03/24] drm/i915/dg1: Define MOCS table for DG1 Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 04/24] drm/i915/dg1: Add DG1 power wells Lucas De Marchi
2020-09-30 15:44 ` Matt Roper
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 05/24] drm/i915/dg1: Increase mmio size to 4MB Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 06/24] drm/i915/dg1: Wait for pcode/uncore handshake at startup Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 07/24] drm/i915/dg1: Add DPLL macros for DG1 Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 08/24] drm/i915/dg1: Add and setup DPLLs " Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 09/24] drm/i915/dg1: Enable DPLL " Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 10/24] drm/i915/dg1: add hpd interrupt handling Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 11/24] drm/i915/dg1: invert HPD pins Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 12/24] drm/i915/dg1: gmbus pin mapping Lucas De Marchi
2020-09-30 16:17 ` Matt Roper
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 13/24] drm/i915/dg1: Enable first 2 ports for DG1 Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 14/24] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 15/24] drm/i915/dg1: Update comp master/slave relationships for PHYs Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 16/24] drm/i915/dg1: Update voltage swing tables for DP Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 17/24] drm/i915/dg1: provide port/phy mapping for vbt Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 18/24] drm/i915/dg1: map/unmap pll clocks Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 19/24] drm/i915/dg1: enable PORT C/D aka D/E Lucas De Marchi
2020-09-30 17:33 ` Matt Roper
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 20/24] drm/i915/dg1: Load DMC Lucas De Marchi
2020-09-30 16:10 ` Matt Roper
2020-09-30 16:18 ` Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 21/24] drm/i915/dg1: Add initial DG1 workarounds Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 22/24] drm/i915/dg1: DG1 does not support DC6 Lucas De Marchi
2020-09-30 16:50 ` Matt Roper
2020-10-08 4:20 ` Lucas De Marchi
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 23/24] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers Lucas De Marchi
2020-09-30 17:20 ` Matt Roper
2020-10-01 5:16 ` Lucas De Marchi
2020-10-01 14:51 ` Matt Roper
2020-09-30 6:42 ` [Intel-gfx] [PATCH v6 24/24] drm/i915/dgfx: define llc and snooping behaviour Lucas De Marchi
2020-09-30 7:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 Patchwork
2020-09-30 7:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-30 7:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-09-30 8:01 ` Lucas De Marchi
2020-09-30 9:14 ` Matthew Auld [this message]
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