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From: "Souza, Jose" <jose.souza@intel.com>
To: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 3/5] drm/i915/display: Split and export main surface calculation from skl_check_main_surface()
Date: Fri, 27 Nov 2020 14:10:32 +0000	[thread overview]
Message-ID: <799f3aeb3caccbd1f91fa6cf9aa70dd2b969143b.camel@intel.com> (raw)
In-Reply-To: <20201127105041.2793779-3-gwan-gyeong.mun@intel.com>

On Fri, 2020-11-27 at 12:50 +0200, Gwan-gyeong Mun wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
> 
> The calculation the offsets of the main surface will be needed by PSR2
> selective fetch code so here splitting and exporting it.
> No functional changes were done here.
> 
> v3: Rebased
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 62 +++++++++++++-------
>  drivers/gpu/drm/i915/display/intel_display.h |  2 +
>  2 files changed, 42 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 595183f7b60f..da24f654a2f4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -3817,22 +3817,21 @@ static int intel_plane_max_height(struct intel_plane *plane,
>  		return INT_MAX;
>  }
>  
> 
> 
> 
> 
> 
> 
> 
> -static int skl_check_main_surface(struct intel_plane_state *plane_state)
> +int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> +				 int *x, int *y, u32 *offset)
>  {
>  	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
>  	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>  	const struct drm_framebuffer *fb = plane_state->hw.fb;
> -	unsigned int rotation = plane_state->hw.rotation;
> -	int x = plane_state->uapi.src.x1 >> 16;
> -	int y = plane_state->uapi.src.y1 >> 16;
> -	int w = drm_rect_width(&plane_state->uapi.src) >> 16;
> -	int h = drm_rect_height(&plane_state->uapi.src) >> 16;
> -	int min_width = intel_plane_min_width(plane, fb, 0, rotation);
> -	int max_width = intel_plane_max_width(plane, fb, 0, rotation);
> -	int max_height = intel_plane_max_height(plane, fb, 0, rotation);
> -	int aux_plane = intel_main_to_aux_plane(fb, 0);
> -	u32 aux_offset = plane_state->color_plane[aux_plane].offset;
> -	u32 alignment, offset;
> +	const unsigned int rotation = plane_state->hw.rotation;
> +	const int min_width = intel_plane_min_width(plane, fb, 0, rotation);
> +	const int max_width = intel_plane_max_width(plane, fb, 0, rotation);
> +	const int max_height = intel_plane_max_height(plane, fb, 0, rotation);
> +	const int aux_plane = intel_main_to_aux_plane(fb, 0);
> +	const u32 aux_offset = plane_state->color_plane[aux_plane].offset;
> +	const u32 alignment = intel_surf_alignment(fb, 0);
> +	const int w = drm_rect_width(&plane_state->uapi.src) >> 16;
> +	const int h = drm_rect_height(&plane_state->uapi.src) >> 16;
>  
> 
> 
> 
> 
> 
> 
> 
>  	if (w > max_width || w < min_width || h > max_height) {


This block should be kept in skl_check_main_surface(), also some variables above.
We don't need to run this checks again for PSR code.

>  		drm_dbg_kms(&dev_priv->drm,
> @@ -3841,9 +3840,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
>  		return -EINVAL;
>  	}
>  
> 
> 
> 
> -	intel_add_fb_offsets(&x, &y, plane_state, 0);
> -	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 0);
> -	alignment = intel_surf_alignment(fb, 0);
> +	intel_add_fb_offsets(x, y, plane_state, 0);
> +	*offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0);
>  	if (drm_WARN_ON(&dev_priv->drm, alignment && !is_power_of_2(alignment)))
>  		return -EINVAL;
>  
> 
> 
> 
> @@ -3852,9 +3850,10 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
>  	 * main surface offset, and it must be non-negative. Make
>  	 * sure that is what we will get.
>  	 */
> -	if (aux_plane && offset > aux_offset)
> -		offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
> -							   offset, aux_offset & ~(alignment - 1));
> +	if (aux_plane && *offset > aux_offset)
> +		*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,
> +							    *offset,
> +							    aux_offset & ~(alignment - 1));
>  
> 
> 
> 
>  	/*
>  	 * When using an X-tiled surface, the plane blows up
> @@ -3865,18 +3864,37 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
>  	if (fb->modifier == I915_FORMAT_MOD_X_TILED) {
>  		int cpp = fb->format->cpp[0];
>  
> 
> 
> 
> -		while ((x + w) * cpp > plane_state->color_plane[0].stride) {
> -			if (offset == 0) {
> +		while ((*x + w) * cpp > plane_state->color_plane[0].stride) {
> +			if (*offset == 0) {
>  				drm_dbg_kms(&dev_priv->drm,
>  					    "Unable to find suitable display surface offset due to X-tiling\n");
>  				return -EINVAL;
>  			}
>  
> 
> 
> 
> -			offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
> -								   offset, offset - alignment);
> +			*offset = intel_plane_adjust_aligned_offset(x, y, plane_state, 0,
> +								    *offset,
> +								    *offset - alignment);
>  		}
>  	}
>  
> 
> 
> 
> +	return 0;
> +}
> +
> +static int skl_check_main_surface(struct intel_plane_state *plane_state)
> +{
> +	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> +	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> +	const struct drm_framebuffer *fb = plane_state->hw.fb;
> +	int x = plane_state->uapi.src.x1 >> 16;
> +	int y = plane_state->uapi.src.y1 >> 16;
> +	const int aux_plane = intel_main_to_aux_plane(fb, 0);
> +	const u32 alignment = intel_surf_alignment(fb, 0);
> +	u32 offset;
> +	int ret;
> +
> +	ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset);
> +	if (ret)
> +		return ret;
>  	/*
>  	 * CCS AUX surface doesn't have its own x/y offsets, we must make sure
>  	 * they match with the main surface x/y offsets.
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index b2969d8ff625..f9ce98eae020 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -636,6 +636,8 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
>  u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state);
>  u32 skl_plane_stride(const struct intel_plane_state *plane_state,
>  		     int plane);
> +int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
> +				 int *x, int *y, u32 *offset);
>  int skl_check_plane_surface(struct intel_plane_state *plane_state);
>  int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
>  int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);

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  reply	other threads:[~2020-11-27 14:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-27 10:50 [Intel-gfx] [PATCH v3 1/5] drm/i915/display/psr: Calculate selective fetch plane registers Gwan-gyeong Mun
2020-11-27 10:50 ` [Intel-gfx] [PATCH v3 2/5] drm/i915/display/psr: Calculate Trancoder's SU rect and plane's SF rect Gwan-gyeong Mun
2020-11-27 10:50 ` [Intel-gfx] [PATCH v3 3/5] drm/i915/display: Split and export main surface calculation from skl_check_main_surface() Gwan-gyeong Mun
2020-11-27 14:10   ` Souza, Jose [this message]
2020-11-27 10:50 ` [Intel-gfx] [PATCH v3 4/5] drm/i915/display/psr: Program Plane's calculated offset to Plane SF register Gwan-gyeong Mun
2020-11-27 10:50 ` [Intel-gfx] [PATCH v3 5/5] HAX/DO_NOT_MERGE_IT: drm/i915/display: Enable PSR2 selective fetch for testing Gwan-gyeong Mun
2020-11-27 13:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/5] drm/i915/display/psr: Calculate selective fetch plane registers Patchwork
2020-11-27 13:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-27 14:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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