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From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "luca@coelho.fi" <luca@coelho.fi>,
	"Kahola, Mika" <mika.kahola@intel.com>,
	 "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/mtl: Reset only one lane in case of MFD
Date: Mon, 5 Jun 2023 09:41:22 +0000	[thread overview]
Message-ID: <7af7fe7bcf2658cd9770de67e828c83bbb19a654.camel@intel.com> (raw)
In-Reply-To: <051c3a968f25cbfa63eb55b378aa680b7225b643.camel@coelho.fi>

On Thu, 2023-06-01 at 15:34 +0300, Luca Coelho wrote:
> On Thu, 2023-06-01 at 13:13 +0300, Mika Kahola wrote:
> > In case when only two or less transmit lanes are owned such as MFD
> > (DP-alt with x2 lanes) we need to reset only one data lane (lane0).
> > With only x2 lanes we don't need to poll for the phy current
> > status on both data lanes since only the owned data lane will
> > respond.
> > 
> > v2: Find better naming for lanes and revise the commit message
> > (Luca)
> > 
> > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> (v1)
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cx0_phy.c | 39 ++++++++++++----
> > ----
> >  1 file changed, 23 insertions(+), 16 deletions(-)
> 
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

Thank you Luca for the review. This is now pushed.

> 
> --
> Cheers,
> Luca.


  reply	other threads:[~2023-06-05  9:41 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-01 10:13 [Intel-gfx] [PATCH v2] drm/i915/mtl: Reset only one lane in case of MFD Mika Kahola
2023-06-01 12:34 ` Luca Coelho
2023-06-05  9:41   ` Hogander, Jouni [this message]
2023-06-01 18:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mtl: Reset only one lane in case of MFD (rev2) Patchwork
2023-06-03 19:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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