Re: [PATCH] drm/i915: fix overlay on i830M

[Chris Wilson <chris@chris-wilson.co.uk>]

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On Tue, 23 Oct 2012 11:12:02 +0200, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Mon, Oct 22, 2012 at 12:55:55PM +0200, Daniel Vetter wrote:
> > The overlay on the i830M has a peculiar failure mode: It works the
> > first time around after boot-up, but consistenly hangs the second time
> > it's used.
> > 
> > Chris Wilson has dug out a nice errata:
> > 
> > "1.5.12 Clock Gating Disable for Display Register
> > Address Offset:	06200h–06203h
> > 
> > "Bit 3
> > Ovrunit Clock Gating Disable.
> > 0 = Clock gating controlled by unit enabling logic
> > 1 = Disable clock gating function
> > DevALM Errata ALM049: Overlay Clock Gating Must be Disabled:  Overlay
> > & L2 Cache clock gating must be disabled in order to prevent device
> > hangs when turning off overlay.SW must turn off Ovrunit clock gating
> > (6200h) and L2 Cache clock gating (C8h)."
> > 
> > Now I've nowhere found that 0xc8 register and hence couldn't apply the
> > l2 cache workaround. But I've remembered that part of the magic that
> > the OVERLAY_ON/OFF commands are supposed to do is to rearrange cache
> > allocations so that the overlay scaler has some scratch space.
> > 
> > And while pondering how that could explain the hang the 2nd time we
> > enable the overlay, I've remembered that the old ums overlay code did
> > _not_ issue the OVERLAY_OFF cmd.
> > 
> > And indeed, disabling the OFF cmd results in the overlay working
> > flawlessly, so I guess we can workaround the lack of the above
> > workaround by simply never disabling the overlay engine once it's
> > enabled.
> > 
> > v2: Add a comment in the code.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47827
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> Tested-by: Rhys <rhyspuk@gmail.com>

If you care to mention that you are not turning off the old w/a in case
it has further side-effects,

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

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