From: shuang.he@intel.com
To: shuang.he@intel.com, intel-gfx@lists.freedesktop.org,
bradley.d.volkin@intel.com
Subject: Re: [PATCH v4 7/7] drm/i915: Tidy up execbuffer command
Date: 07 Nov 2014 14:25:27 -0800 [thread overview]
Message-ID: <84c8a8$i0ct7v@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1415398927-16572-8-git-send-email-bradley.d.volkin@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform: baseline_drm_intel_nightly_pass_rate->patch_applied_pass_rate
BYT: pass/total=348/348->348/348
PNV: pass/total=325/328->324/328
ILK: pass/total=329/330->330/330
IVB: pass/total=538/546->534/546
SNB: pass/total=531/541->532/541
HSW: pass/total=476/487->471/487
BDW: pass/total=430/435->430/435
-------------------------------------Detailed-------------------------------------
test_platform: test_suite, test_case, result_with_drm_intel_nightly(count, machine_id...)...->result_with_patch_applied(count, machine_id)...
PNV: Intel_gpu_tools, igt_gem_concurrent_blit_cpu-rcs-early-read-interruptible, DMESG_WARN(1, M25)PASS(6, M23M25) -> DMESG_WARN(1, M23)PASS(3, M23)
ILK: Intel_gpu_tools, igt_kms_flip_flip-vs-panning-vs-hang, DMESG_WARN(1, M26)PASS(6, M6) -> PASS(4, M6)
IVB: Intel_gpu_tools, igt_gem_exec_parse_cmd-crossing-page, FAIL(3, M34)PASS(1, M4) -> FAIL(1, M34)PASS(3, M34)
IVB: Intel_gpu_tools, igt_gem_madvise_dontneed-before-exec, FAIL(3, M34)PASS(1, M4) -> FAIL(1, M34)PASS(3, M34)
IVB: Intel_gpu_tools, igt_kms_pipe_crc_basic_hang-read-crc-pipe-B, PASS(4, M4M34) -> TIMEOUT(1, M34)PASS(3, M34)
IVB: Intel_gpu_tools, igt_kms_pipe_crc_basic_hang-read-crc-pipe-C, PASS(4, M4M34) -> TIMEOUT(1, M34)PASS(3, M34)
SNB: Intel_gpu_tools, igt_kms_cursor_crc_cursor-256x256-random, DMESG_WARN(1, M22)PASS(6, M35) -> PASS(4, M35)
HSW: Intel_gpu_tools, igt_gem_bad_reloc_negative-reloc, NSPT(1, M39)PASS(3, M39) -> NSPT(2, M39)PASS(2, M39)
HSW: Intel_gpu_tools, igt_gem_bad_reloc_negative-reloc-lut, PASS(4, M39) -> NSPT(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_gem_exec_parse_cmd-crossing-page, FAIL(3, M39)PASS(1, M39) -> FAIL(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_gem_madvise_dontneed-before-exec, FAIL(3, M39)PASS(1, M39) -> FAIL(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_gem_reset_stats_close-pending-fork-reverse-render, PASS(4, M39) -> NO_RESULT(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-128x128-onscreen, DMESG_WARN(2, M39)PASS(5, M19M39) -> PASS(4, M39)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-256x256-offscreen, DMESG_WARN(1, M39)PASS(6, M19M39) -> DMESG_WARN(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-256x256-onscreen, PASS(4, M39) -> DMESG_WARN(3, M39)PASS(1, M39)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-64x64-offscreen, DMESG_WARN(2, M39)PASS(2, M39) -> DMESG_WARN(4, M39)
HSW: Intel_gpu_tools, igt_kms_cursor_crc_cursor-64x64-sliding, DMESG_WARN(1, M39)PASS(3, M39) -> DMESG_WARN(1, M39)PASS(3, M39)
HSW: Intel_gpu_tools, igt_kms_flip_dpms-vs-vblank-race, DMESG_WARN(2, M39)PASS(5, M19M39) -> PASS(4, M39)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-11-07 22:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-07 22:22 [PATCH v4 0/7] Command parser batch buffer copy bradley.d.volkin
2014-11-07 22:22 ` [PATCH v4 1/7] drm/i915: Implement a framework for batch buffer pools bradley.d.volkin
2014-11-12 8:44 ` Daniel Vetter
2014-11-12 9:46 ` Chris Wilson
2014-11-12 16:33 ` Daniel Vetter
2014-11-12 16:38 ` Chris Wilson
2014-11-22 1:28 ` Michael H. Nguyen
2014-11-24 9:18 ` Daniel Vetter
2014-11-12 9:42 ` Chris Wilson
2014-11-07 22:22 ` [PATCH v4 2/7] drm/i915: Use batch pools with the command parser bradley.d.volkin
2014-11-12 9:49 ` Chris Wilson
2014-11-07 22:22 ` [PATCH v4 3/7] drm/i915: Add a batch pool debugfs file bradley.d.volkin
2014-11-07 22:22 ` [PATCH v4 4/7] drm/i915: Add batch pool details to i915_gem_objects debugfs bradley.d.volkin
2014-11-07 22:22 ` [PATCH v4 5/7] drm/i915: Use batch length instead of object size in command parser bradley.d.volkin
2014-11-07 22:22 ` [PATCH v4 6/7] drm/i915: Mark shadow batch buffers as purgeable bradley.d.volkin
2014-11-12 8:46 ` Daniel Vetter
2014-11-07 22:22 ` [PATCH v4 7/7] drm/i915: Tidy up execbuffer command parsing code bradley.d.volkin
2014-11-07 22:25 ` shuang.he [this message]
2014-11-12 9:37 ` Chris Wilson
2014-11-22 1:17 ` Michael H. Nguyen
2014-11-24 9:20 ` Daniel Vetter
2014-11-12 8:51 ` [PATCH v4 0/7] Command parser batch buffer copy Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='84c8a8$i0ct7v@orsmga001.jf.intel.com' \
--to=shuang.he@intel.com \
--cc=bradley.d.volkin@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox