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From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "airlied@linux.ie" <airlied@linux.ie>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v4 07/16] drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion
Date: Sun, 13 Dec 2020 07:10:33 +0000	[thread overview]
Message-ID: <84fd6863339d4737a67decd2a9787a23@intel.com> (raw)
In-Reply-To: <20201208075145.17389-8-ankit.k.nautiyal@intel.com>



> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Tuesday, December 8, 2020 1:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> airlied@linux.ie; jani.nikula@linux.intel.com; ville.syrjala@linux.intel.com;
> Kulkarni, Vandita <vandita.kulkarni@intel.com>; Sharma, Swati2
> <swati2.sharma@intel.com>
> Subject: [PATCH v4 07/16] drm/dp_helper: Add helpers to configure PCONs RGB-
> YCbCr Conversion
> 
> DP Specification for DP2.0 to HDMI2.1 Pcon specifies support for conversion of
> colorspace from RGB to YCbCr.
> https://groups.vesa.org/wg/DP/document/previewpdf/15651
> 
> This patch adds the relavant registers and helper functions to get the capability
> and set the color conversion bits for rgb->ycbcr conversion through PCON.
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/drm_dp_helper.c | 59 +++++++++++++++++++++++++++++++++
>  include/drm/drm_dp_helper.h     | 10 +++++-
>  2 files changed, 68 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/drm_dp_helper.c
> b/drivers/gpu/drm/drm_dp_helper.c index d0626f57f99c..344662d5c295 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -949,6 +949,35 @@ bool
> drm_dp_downstream_444_to_420_conversion(const u8
> dpcd[DP_RECEIVER_CAP_SIZE]  }
> EXPORT_SYMBOL(drm_dp_downstream_444_to_420_conversion);
> 
> +/**
> + * drm_dp_downstream_rgb_to_ycbcr_conversion() - determine downstream
> facing port
> + *                                               RGB->YCbCr conversion capability
> + * @dpcd: DisplayPort configuration data
> + * @port_cap: downstream facing port capabilities
> + *
> + * Returns: whether the downstream facing port can convert RGB->YCbCr
> +*/ bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8
> +dpcd[DP_RECEIVER_CAP_SIZE],
> +					       const u8 port_cap[4])
> +{
> +	if (!drm_dp_is_branch(dpcd))
> +		return false;
> +
> +	if (dpcd[DP_DPCD_REV] < 0x13)
> +		return false;
> +
> +	switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
> +	case DP_DS_PORT_TYPE_HDMI:
> +		if ((dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> DP_DETAILED_CAP_INFO_AVAILABLE) == 0)
> +			return false;
> +
> +		return port_cap[3] & DP_DS_HDMI_BT601_RGB_YCBCR_CONV;

I guess there are other conversions also possible, like BT709 and 2020. Update those
as well here.

> +	default:
> +		return false;
> +	}
> +}
> +EXPORT_SYMBOL(drm_dp_downstream_rgb_to_ycbcr_conversion);
> +
>  /**
>   * drm_dp_downstream_mode() - return a mode for downstream facing port
>   * @dev: DRM device
> @@ -3140,3 +3169,33 @@ int drm_dp_pcon_pps_override_param(struct
> drm_dp_aux *aux, u8 pps_param[6])
>  	return 0;
>  }
>  EXPORT_SYMBOL(drm_dp_pcon_pps_override_param);
> +
> +/*
> + * drm_dp_pcon_convert_rgb_to_ycbcr() - Configure the PCon to convert
> +RGB to Ycbcr
> + * @aux: displayPort AUX channel
> + * @color_spc: Color space conversion type
> + *
> + * Returns 0 on success, else returns negative error code.
> + */
> +int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8
> +color_spc) {
> +	int ret;
> +	u8 buf;
> +
> +	if (color_spc != DP_CONVERSION_BT601_RGB_YCBCR_ENABLE ||
> +	    color_spc != DP_CONVERSION_BT709_RGB_YCBCR_ENABLE ||
> +	    color_spc != DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE)
> +		return -EINVAL;

Yeah this is wrong, fix it.

> +
> +	ret = drm_dp_dpcd_readb(aux, DP_PROTOCOL_CONVERTER_CONTROL_2,
> &buf);
> +	if (ret < 0)
> +		return ret;
> +
> +	buf |= color_spc;
> +	ret = drm_dp_dpcd_writeb(aux,
> DP_PROTOCOL_CONVERTER_CONTROL_2, buf);
> +	if (ret < 0)
> +		return ret;
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL(drm_dp_pcon_convert_rgb_to_ycbcr);
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index
> 347b4e1a55b4..1b3d54ed7a78 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -431,6 +431,9 @@ struct drm_device;
>  # define DP_DS_HDMI_YCBCR420_PASS_THROUGH   (1 << 2)
>  # define DP_DS_HDMI_YCBCR444_TO_422_CONV    (1 << 3)
>  # define DP_DS_HDMI_YCBCR444_TO_420_CONV    (1 << 4)
> +# define DP_DS_HDMI_BT601_RGB_YCBCR_CONV    (1 << 5)
> +# define DP_DS_HDMI_BT709_RGB_YCBCR_CONV    (1 << 6)
> +# define DP_DS_HDMI_BT2020_RGB_YCBCR_CONV   (1 << 7)

I think it would be good to mention the location in spec (section or table),
will make it easier to understand/review by directly going to relevant sections in spec.

> 
>  #define DP_MAX_DOWNSTREAM_PORTS		    0x10
> 
> @@ -1217,7 +1220,9 @@ struct drm_device;
>  # define DP_PCON_ENC_PPS_OVERRIDE_DISABLED      0
>  # define DP_PCON_ENC_PPS_OVERRIDE_EN_PARAMS     1
>  # define DP_PCON_ENC_PPS_OVERRIDE_EN_BUFFER     2
> -
> +# define DP_CONVERSION_BT601_RGB_YCBCR_ENABLE  (1 << 4) # define
> +DP_CONVERSION_BT709_RGB_YCBCR_ENABLE  (1 << 5) # define
> +DP_CONVERSION_BT2020_RGB_YCBCR_ENABLE (1 << 6)
> 
>  /* PCON Downstream HDMI ERROR Status per Lane */
>  #define DP_PCON_HDMI_ERROR_STATUS_LN0          0x3037
> @@ -2178,5 +2183,8 @@ int drm_dp_pcon_dsc_bpp_incr(const u8
> pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE
>  int drm_dp_pcon_pps_default(struct drm_dp_aux *aux);  int
> drm_dp_pcon_pps_override_buf(struct drm_dp_aux *aux, u8 pps_buf[128]);  int
> drm_dp_pcon_pps_override_param(struct drm_dp_aux *aux, u8 pps_param[6]);
> +bool drm_dp_downstream_rgb_to_ycbcr_conversion(const u8
> dpcd[DP_RECEIVER_CAP_SIZE],
> +					       const u8 port_cap[4]);
> +int drm_dp_pcon_convert_rgb_to_ycbcr(struct drm_dp_aux *aux, u8
> +color_spc);
> 
>  #endif /* _DRM_DP_HELPER_H_ */
> --
> 2.17.1

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  parent reply	other threads:[~2020-12-13  7:10 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-08  7:51 [Intel-gfx] [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 01/16] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 02/16] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 03/16] drm/edid: Parse DSC1.2 cap fields " Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 04/16] drm/dp_helper: Add Helpers for FRL Link Training support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 05/16] drm/dp_helper: Add support for link failure detection Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 06/16] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 07/16] drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion Ankit Nautiyal
2020-12-09 17:50   ` Dan Carpenter
2020-12-10 12:20     ` Nautiyal, Ankit K
2020-12-13  7:10   ` Shankar, Uma [this message]
2020-12-14 13:17     ` Nautiyal, Ankit K
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 08/16] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 09/16] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 10/16] drm/i915: Check for FRL training before DP Link training Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 11/16] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 12/16] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 13/16] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-12-13  7:13   ` Shankar, Uma
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 14/16] drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-12-13  7:16   ` Shankar, Uma
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 15/16] drm/i915: Let PCON convert from RGB to YUV if it can Ankit Nautiyal
2020-12-13  7:23   ` Shankar, Uma
2020-12-14 13:27     ` Nautiyal, Ankit K
2020-12-08  7:51 ` [Intel-gfx] [PATCH v4 16/16] drm/i915: Enable PCON configuration for Color Conversion for TGL Ankit Nautiyal
2020-12-13  7:29   ` Shankar, Uma
2020-12-14 13:51     ` Nautiyal, Ankit K
2020-12-08  8:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev6) Patchwork
2020-12-08  8:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-08  8:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-08  9:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-08 10:33 ` [Intel-gfx] [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Jani Nikula

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