From: Andrzej Hajda <andrzej.hajda@intel.com>
To: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 11/11] drm/i915/tc: switch to intel_de_* register accessors in display code
Date: Thu, 8 Dec 2022 11:44:29 +0100 [thread overview]
Message-ID: <851eb9cc-305c-aa6c-e5a4-9e1283dd8984@intel.com> (raw)
In-Reply-To: <8c29f4f76c2163da309ead0bf48652024f134f11.1670433372.git.jani.nikula@intel.com>
On 07.12.2022 18:17, Jani Nikula wrote:
> Avoid direct uncore use in display code.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Regards
Andrzej
> ---
> drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++-----------------
> 1 file changed, 18 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 70624b4b2d38..f45328712bff 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -5,6 +5,7 @@
>
> #include "i915_drv.h"
> #include "i915_reg.h"
> +#include "intel_de.h"
> #include "intel_display.h"
> #include "intel_display_power_map.h"
> #include "intel_display_types.h"
> @@ -120,11 +121,9 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port)
> u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 lane_mask;
>
> - lane_mask = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>
> drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff);
> assert_tc_cold_blocked(dig_port);
> @@ -136,11 +135,9 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
> u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 pin_mask;
>
> - pin_mask = intel_uncore_read(uncore,
> - PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
> + pin_mask = intel_de_read(i915, PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
>
> drm_WARN_ON(&i915->drm, pin_mask == 0xffffffff);
> assert_tc_cold_blocked(dig_port);
> @@ -186,7 +183,6 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> drm_WARN_ON(&i915->drm,
> @@ -194,8 +190,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>
> assert_tc_cold_blocked(dig_port);
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
> val &= ~DFLEXDPMLE1_DPMLETC_MASK(dig_port->tc_phy_fia_idx);
>
> switch (required_lanes) {
> @@ -216,8 +211,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> MISSING_CASE(required_lanes);
> }
>
> - intel_uncore_write(uncore,
> - PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> + intel_de_write(i915, PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
> }
>
> static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> @@ -246,13 +240,11 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
> static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> u32 mask = 0;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
>
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> @@ -266,7 +258,7 @@ static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> if (val & TC_LIVE_STATE_TC(dig_port->tc_phy_fia_idx))
> mask |= BIT(TC_PORT_DP_ALT);
>
> - if (intel_uncore_read(uncore, SDEISR) & isr_bit)
> + if (intel_de_read(i915, SDEISR) & isr_bit)
> mask |= BIT(TC_PORT_LEGACY);
>
> /* The sink can be connected only in a single mode. */
> @@ -281,7 +273,6 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val, mask = 0;
>
> /*
> @@ -289,13 +280,13 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
> * registers in IOM. Note that this doesn't apply to PHY and FIA
> * registers.
> */
> - val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
> + val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT)
> mask |= BIT(TC_PORT_DP_ALT);
> if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_TBT)
> mask |= BIT(TC_PORT_TBT_ALT);
>
> - if (intel_uncore_read(uncore, SDEISR) & isr_bit)
> + if (intel_de_read(i915, SDEISR) & isr_bit)
> mask |= BIT(TC_PORT_LEGACY);
>
> /* The sink can be connected only in a single mode. */
> @@ -326,11 +317,9 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
> static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assuming not complete\n",
> @@ -352,10 +341,9 @@ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port));
> + val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assuming not complete\n",
> @@ -380,11 +368,9 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> bool take)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, can't %s ownership\n",
> @@ -397,8 +383,7 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> if (take)
> val |= DP_PHY_MODE_STATUS_NOT_SAFE(dig_port->tc_phy_fia_idx);
>
> - intel_uncore_write(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
> + intel_de_write(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
>
> return true;
> }
> @@ -407,11 +392,10 @@ static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
> bool take)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> enum port port = dig_port->base.port;
>
> - intel_uncore_rmw(uncore, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> - take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
> + intel_de_rmw(i915, DDI_BUF_CTL(port), DDI_BUF_CTL_TC_PHY_OWNERSHIP,
> + take ? DDI_BUF_CTL_TC_PHY_OWNERSHIP : 0);
>
> return true;
> }
> @@ -429,11 +413,9 @@ static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take
> static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> u32 val;
>
> - val = intel_uncore_read(uncore,
> - PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
> if (val == 0xffffffff) {
> drm_dbg_kms(&i915->drm,
> "Port %s: PHY in TCCOLD, assume safe mode\n",
> @@ -447,11 +429,10 @@ static bool icl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
> {
> struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - struct intel_uncore *uncore = &i915->uncore;
> enum port port = dig_port->base.port;
> u32 val;
>
> - val = intel_uncore_read(uncore, DDI_BUF_CTL(port));
> + val = intel_de_read(i915, DDI_BUF_CTL(port));
> return val & DDI_BUF_CTL_TC_PHY_OWNERSHIP;
> }
>
> @@ -907,7 +888,7 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig
>
> mutex_lock(&dig_port->tc_lock);
> wakeref = tc_cold_block(dig_port, &domain);
> - val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1));
> + val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
> tc_cold_unblock(dig_port, domain, wakeref);
> mutex_unlock(&dig_port->tc_lock);
>
next prev parent reply other threads:[~2022-12-08 10:44 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 17:17 [Intel-gfx] [PATCH v2 00/11] drm/i915/display: switch to intel_de_* register accessors Jani Nikula
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 01/11] drm/i915/de: Add more macros to remove all direct calls to uncore Jani Nikula
2022-12-08 10:29 ` Andrzej Hajda
2022-12-08 13:14 ` Jani Nikula
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 02/11] drm/i915/de: return the old register value from intel_de_rmw() Jani Nikula
2022-12-08 10:30 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 03/11] drm/i915/crt: drop a bunch of unnecessary register variables Jani Nikula
2022-12-08 10:35 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 04/11] drm/i915/crt: switch to intel_de_* register accessors in display code Jani Nikula
2022-12-08 10:38 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 05/11] drm/i915/power: " Jani Nikula
2022-12-08 10:39 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 06/11] drm/i915/dmc: " Jani Nikula
2022-12-08 10:40 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 07/11] drm/i915/dp-aux: " Jani Nikula
2022-12-08 10:41 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 08/11] drm/i915/gmbus: " Jani Nikula
2022-12-08 10:41 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 09/11] drm/i915/wm: " Jani Nikula
2022-12-08 10:42 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 10/11] drm/i915/snps: " Jani Nikula
2022-12-08 10:43 ` Andrzej Hajda
2022-12-07 17:17 ` [Intel-gfx] [PATCH v2 11/11] drm/i915/tc: " Jani Nikula
2022-12-08 10:44 ` Andrzej Hajda [this message]
2022-12-07 19:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: switch to intel_de_* register accessors (rev2) Patchwork
2022-12-07 20:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-12-08 2:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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