Re: [PATCH v3] drm/i915/vrr: Disable DC balance by default

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 9/17/2026 1:13 PM, Mitul Golani wrote:
> Disable VRR DC balance by default due to timing issues observed on some
> panel/TCON combinations.
>
> Keep the module parameter to enable DC balance during debugging and to
> isolate DC balance effects from underlying VRR/display timing issues.
>
> --v2:
> - Make enable_dc_balance a bool and keep it disabled by default; fix the
>    parameter type/value mismatch and correct the description (Chaitanya
>    Kumar Borah, Jani Nikula)
> - Explain in the commit message why the feature is gated and why a
>    module parameter is used (Jani Nikula)
>
> --v3:
> - Commit message update (Jani Nikula)
>
> Fixes: 555819270707 ("drm/i915/vrr: Enable DC Balance")
> Cc: <stable@vger.kernel.org> # v7.0+
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
>   drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>   drivers/gpu/drm/i915/display/intel_vrr.c            | 4 +++-
>   3 files changed, 8 insertions(+), 1 deletion(-)


Thanks for the patch, pushed to drm-intel-next.


Regards,

Ankit

>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 2aed110c5b090..ca0ef466bb103 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -120,6 +120,10 @@ intel_display_param_named_unsafe(enable_psr, int, 0400,
>   	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
>   	"Default: -1 (use per-chip default)");
>   
> +intel_display_param_named_unsafe(enable_dc_balance, bool, 0400,
> +	"Enable VRR DC balance (0=disabled, 1=enabled). "
> +	"Default: 0 (disabled)");
> +
>   intel_display_param_named_unsafe(enable_panel_replay, int, 0400,
>   	"Enable Panel Replay (0=disabled, 1=enabled). Default: -1 (use per-chip default)");
>   
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index ba01aeaf89440..5c5a1a1358c32 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -46,6 +46,7 @@ struct drm_printer;
>   	param(bool, enable_dp_mst, true, 0600) \
>   	param(int, enable_fbc, -1, 0600) \
>   	param(int, enable_psr, -1, 0600) \
> +	param(bool, enable_dc_balance, false, 0600) \
>   	param(int, enable_panel_replay, -1, 0600) \
>   	param(bool, psr_safest_params, false, 0400) \
>   	param(bool, enable_psr2_sel_fetch, true, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index e36db11744405..1698c54e258b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -439,10 +439,12 @@ static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_st
>   static void
>   intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
>   {
> +	struct intel_display *display = to_intel_display(crtc_state);
>   	int guardband_usec, adjustment_usec;
>   	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
>   
> -	if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
> +	if (!intel_vrr_dc_balance_possible(crtc_state) ||
> +	    !crtc_state->vrr.enable || !display->params.enable_dc_balance)
>   		return;
>   
>   	crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;