From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Vivi\, Rodrigo" <rodrigo.vivi@intel.com>,
"joonas.lahtinen\@linux.intel.com"
<joonas.lahtinen@linux.intel.com>, "Huang\,
Sean Z" <sean.z.huang@intel.com>,
"Intel-gfx\@lists.freedesktop.org"
<Intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [RFC-v19 02/13] drm/i915/pxp: set KCR reg init during the boot time
Date: Tue, 12 Jan 2021 17:36:02 +0200 [thread overview]
Message-ID: <871requpzx.fsf@intel.com> (raw)
In-Reply-To: <dc0506d6ba1f28d6ceda1fc2763f010213cc0031.camel@intel.com>
On Tue, 12 Jan 2021, "Vivi, Rodrigo" <rodrigo.vivi@intel.com> wrote:
> On Mon, 2021-01-11 at 21:38 +0000, Huang, Sean Z wrote:
>> Hello,
>>
>> I see, based on Joonas and Rodrigo's feedback.
>>
>> I made the modification as below, I will still keep the macro in this
>> .c instead of i915_reg.h, and this change will be reflected in rev20.
>>
>> /* KCR register definitions */
>> #define KCR_INIT _MMIO(0x320f0)
>> -#define KCR_INIT_MASK_SHIFT (16)
Useless parenthesis.
>> +
>> /* Setting KCR Init bit is required after system boot */
>> -#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) <<
>> KCR_INIT_MASK_SHIFT))
>> +#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << 16))
BIT(14) << 16 is actually BIT(14+16), or BIT(30). The above is
pointless.
Also, you'll end up with problems by using BIT() instead of REG_BIT()
defined in i915_reg.h due to BIT() using unsigned long.
Also, read the big style comment near the top of i915_reg.h.
BR,
Jani.
>
> This is not what I asked actually.
>
> I asked to get the BIT(14) to be defined separated, shift defined as
> well... and the | and actuall shift operations to be performed in the
> code and not in the defines
>
>>
>> Best regards,
>> Sean
>>
>> -----Original Message-----
>> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> Sent: Friday, January 8, 2021 3:31 AM
>> To: Huang, Sean Z <sean.z.huang@intel.com>;
>> Intel-gfx@lists.freedesktop.org; Vivi, Rodrigo <
>> rodrigo.vivi@intel.com>
>> Subject: Re: [Intel-gfx] [RFC-v19 02/13] drm/i915/pxp: set KCR reg
>> init during the boot time
>>
>> Quoting Vivi, Rodrigo (2021-01-07 17:31:36)
>> > On Wed, 2021-01-06 at 15:12 -0800, Huang, Sean Z wrote:
>> > > Set the KCR init during the boot time, which is required by
>> > > hardware, to allow us doing further protection operation such as
>> > > sending commands to GPU or TEE.
>> > >
>> > > Signed-off-by: Huang, Sean Z <sean.z.huang@intel.com>
>> > > ---
>> > > drivers/gpu/drm/i915/pxp/intel_pxp.c | 8 ++++++++
>> > > 1 file changed, 8 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c
>> > > b/drivers/gpu/drm/i915/pxp/intel_pxp.c
>> > > index 9bc3c7e30654..f566a4fda044 100644
>> > > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c
>> > > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c
>> > > @@ -6,6 +6,12 @@
>> > > #include "intel_pxp.h"
>> > > #include "intel_pxp_context.h"
>> > >
>> > > +/* KCR register definitions */
>> >
>> > please define this in i915_reg.h
>>
>> Generally the trend on the GT side is to contain in a .c file if
>> there are no shared users like these. So they should be at this spot,
>> yet the rest of the review comments apply.
>>
>> The spurious comments should be dropped and like Rodrigo pointed out,
>> we should be using the appropriate macros for a masked writes, not
>> baking in the #define.
>>
>> Regards, Joonas
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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next prev parent reply other threads:[~2021-01-12 15:36 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-06 23:12 [Intel-gfx] [RFC-v19 00/13] Introduce Intel PXP component - Mesa single session Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 01/13] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2021-01-07 15:28 ` Vivi, Rodrigo
2021-01-11 22:06 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 02/13] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2021-01-07 15:31 ` Vivi, Rodrigo
2021-01-08 11:30 ` Joonas Lahtinen
2021-01-11 21:38 ` Huang, Sean Z
2021-01-12 11:27 ` Vivi, Rodrigo
2021-01-12 15:36 ` Jani Nikula [this message]
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 03/13] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2021-01-07 15:36 ` Vivi, Rodrigo
2021-01-11 22:47 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 04/13] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2021-01-07 15:40 ` Vivi, Rodrigo
2021-01-11 23:48 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 05/13] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2021-01-07 15:45 ` Vivi, Rodrigo
2021-01-12 18:53 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 06/13] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 07/13] drm/i915/pxp: Destroy arb session upon teardown Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 08/13] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2021-01-07 15:52 ` Vivi, Rodrigo
2021-01-12 19:14 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 09/13] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2021-01-07 15:54 ` Vivi, Rodrigo
2021-01-18 8:23 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 10/13] mei: pxp: export pavp client to me client bus Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 11/13] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 12/13] drm/i915/pxp: User interface for Protected buffer Huang, Sean Z
2021-01-07 15:58 ` Vivi, Rodrigo
2021-01-18 8:29 ` Huang, Sean Z
2021-01-06 23:12 ` [Intel-gfx] [RFC-v19 13/13] drm/i915/pxp: Add plane decryption support Huang, Sean Z
2021-01-06 23:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Intel PXP component - Mesa single session (rev19) Patchwork
2021-01-07 16:02 ` Vivi, Rodrigo
2021-01-07 0:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-07 10:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-01-07 15:42 ` [Intel-gfx] [RFC-v19 00/13] Introduce Intel PXP component - Mesa single session Vivi, Rodrigo
2021-01-08 11:38 ` Joonas Lahtinen
2021-01-12 20:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Intel PXP component - Mesa single session (rev20) Patchwork
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 00/13] Introduce Intel PXP component - Mesa single session Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 01/13] drm/i915/pxp: Introduce Intel PXP component Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 02/13] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 03/13] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 04/13] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 05/13] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 06/13] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 07/13] drm/i915/pxp: Destroy arb session upon teardown Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 08/13] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 09/13] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 10/13] mei: pxp: export pavp client to me client bus Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 11/13] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 12/13] drm/i915/pxp: User interface for Protected buffer Huang, Sean Z
2021-01-17 6:45 ` [Intel-gfx] [RFC-v21 13/13] drm/i915/pxp: Add plane decryption support Huang, Sean Z
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