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From: Jani Nikula <jani.nikula@intel.com>
To: Vandita Kulkarni <vandita.kulkarni@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in cmd mode
Date: Tue, 15 Sep 2020 15:05:57 +0300	[thread overview]
Message-ID: <871rj3xn16.fsf@intel.com> (raw)
In-Reply-To: <20200909085047.31004-5-vandita.kulkarni@intel.com>

On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> In TE Gate mode or TE NO_GATE mode on every flip
> we need to set the frame update request bit.
> After this  bit is set transcoder hardware will
> automatically send the frame data to the panel
> in case of TE NO_GATE mode, where it sends after
> it receives the TE event in case of TE_GATE mode.
> Once the frame data is sent to the panel, we see
> the frame counter updating.
>
> v2: Use intel_de_read/write
>
> v3: remove the usage of private_flags
>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c       | 26 ++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_display.c | 13 ++++++++++
>  drivers/gpu/drm/i915/display/intel_dsi.h     |  3 +++
>  3 files changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index ee3c5c085cd3..cdc9d8874945 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -205,6 +205,32 @@ static int dsi_send_pkt_payld(struct intel_dsi_host *host,
>  	return 0;
>  }
>  
> +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	u32 tmp, flags;
> +	enum port port;
> +
> +	flags = crtc->mode_flags;
> +
> +	/*
> +	 * case 1 also covers dual link
> +	 * In case of dual link, frame update should be set on
> +	 * DSI_0
> +	 */
> +	if (flags & I915_MODE_FLAG_DSI_USE_TE0)
> +		port = PORT_A;
> +	else if (flags & I915_MODE_FLAG_DSI_USE_TE1)
> +		port = PORT_B;
> +	else
> +		return;
> +
> +	tmp = intel_de_read(dev_priv, DSI_CMD_FRMCTL(port));
> +	tmp |= DSI_FRAME_UPDATE_REQUEST;
> +	intel_de_write(dev_priv, DSI_CMD_FRMCTL(port), tmp);
> +}
> +
>  static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ec148a8da2c2..cd852c24d3bc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15615,6 +15615,18 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>  		intel_set_cdclk_post_plane_update(state);
>  	}
>  
> +	/*
> +	 * Incase of mipi dsi command mode, we need to set frame update
> +	 * for every commit
> +	 */
> +	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> +		if ((INTEL_GEN(dev_priv) >= 11) &&
> +		    (intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))) {

Excessive parens.

> +			if (new_crtc_state->hw.active)
> +				gen11_dsi_frame_update(new_crtc_state);
> +		}
> +	}
> +
>  	/* FIXME: We should call drm_atomic_helper_commit_hw_done() here
>  	 * already, but still need the state for the delayed optimization. To
>  	 * fix this:
> @@ -15626,6 +15638,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>  	 */
>  	drm_atomic_helper_wait_for_flip_done(dev, &state->base);
>  
> +

Superfluous blank line.

>  	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
>  		if (new_crtc_state->hw.active &&
>  		    !needs_modeset(new_crtc_state) &&
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
> index 19f78a4022d3..08f1f586eefb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.h
> @@ -205,6 +205,9 @@ u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
>  		     struct intel_crtc_state *config);
>  void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
>  
> +/* icl_dsi.c */
> +void gen11_dsi_frame_update(struct intel_crtc_state *crtc_state);

There's an icl_dsi.c section above. Maybe prefix the function icl_dsi
while at it; only the static functions in icl_dsi.c are gen11 prefixed
for historical reasons.

> +
>  /* intel_dsi_vbt.c */
>  bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
>  void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on);

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-09-15 12:06 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-09  8:50 [Intel-gfx] [V9 0/4] Add support for mipi dsi cmd mode Vandita Kulkarni
2020-09-09  8:50 ` [Intel-gfx] [V9 1/4] drm/i915/dsi: Add details about TE in get_config Vandita Kulkarni
2020-09-15 11:38   ` Jani Nikula
2020-09-09  8:50 ` [Intel-gfx] [V9 2/4] i915/dsi: Configure TE interrupt for cmd mode Vandita Kulkarni
2020-09-09  8:50 ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi " Vandita Kulkarni
2020-09-09 12:30   ` kernel test robot
2020-09-09 12:30   ` [Intel-gfx] [RFC PATCH] drm/i915/dsi: gen11_dsi_te_interrupt_handler() can be static kernel test robot
2020-09-15 12:01   ` [Intel-gfx] [V9 3/4] drm/i915/dsi: Add TE handler for dsi cmd mode Jani Nikula
2020-09-09  8:50 ` [Intel-gfx] [V9 4/4] drm/i915/dsi: Initiate fame request in " Vandita Kulkarni
2020-09-15 12:05   ` Jani Nikula [this message]
2020-09-15 12:28     ` Kulkarni, Vandita
2020-09-09  9:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for mipi dsi cmd mode (rev9) Patchwork
2020-09-09  9:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-09  9:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-09 11:04 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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